Datasheet

ManualsBrandsVISHAY ManualsFETsIRFPS40N50LPBF, MOSFET

Document Number: 91260 www.vishay.com

S11-0111-Rev. C, 07-Feb-11 1

Power MOSFET

IRFPS40N50L, SiHFPS40N50L

Vishay Siliconix

FEATURES

• Superfast Body Diode Eliminates the Need for

External Diodes in ZVS Applications

• Lower Gate Charge Results in Simpler Drive

Requirements

• Enhanced dV/dt Capabilities Offer Improved Ruggedness

• Higher Gate Voltage Threshold Offers Improved Noise

Immunity

• Compliant to RoHS Directive 2002/95/EC

APPLICATIONS

• Zero Voltage Switching SMPS

• Telecom and Server Power Supplies

• Uninterruptible Power Supplies

• Motor Control Applications

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).

b. Starting T

= 25 °C, L = 0.86 mH, R

= 25 , I

= 46 A (see fig. 12).

c. I

 46 A, dI/dt  550 A/μs, V

 V

, T

 150 °C.

d. 1.6 mm from case.

PRODUCT SUMMARY

(V) 500

DS(on)

()V

= 10 V 0.087

(Max.) (nC) 380

(nC) 80

(nC) 190

Configuration Single

N-Channel MOSFET

Super-247

Available

RoHS*

COMPLIANT

ORDERING INFORMATION

Package

Super-247

Lead (Pb)-free

IRFPS40N50LPbF

SiHFPS40N50L-E3

SnPb

IRFPS40N50L

SiHFPS40N50L

ABSOLUTE MAXIMUM RATINGS (T

= 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V

500

Gate-Source Voltage V

± 30

Continuous Drain Current V

at 10 V

= 25 °C

= 100 °C 29

Pulsed Drain Current

180

Linear Derating Factor 4.3 W/°C

Single Pulse Avalanche Energy

920 mJ

Repetitive Avalanche Current

46 A

Repetitive Avalanche Energy

54 mJ

Maximum Power Dissipation T

= 25 °C P

540 W

Peak Diode Recovery dV/dt

dV/dt 34 V/ns

Operating Junction and Storage Temperature Range T

, T

stg

- 55 to + 150

°C

Soldering Recommendations (Peak Temperature) for 10 s 300

* Pb containing terminations are not RoHS compliant, exemptions may apply

Summary of content (9 pages)

PAGE 1
IRFPS40N50L, SiHFPS40N50L Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Superfast Body Diode Eliminates the Need for External Diodes in ZVS Applications 500 RDS(on) () VGS = 10 V 0.087 Available RoHS* Qg (Max.
PAGE 2
IRFPS40N50L, SiHFPS40N50L Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambienta RthJA - 40 Case-to-Sink, Flat, Greased Surface RthCS 0.24 - Maximum Junction-to-Case (Drain)a RthJC - 0.23 UNIT °C/W Note a. Rth is measured at TJ approximately 90 °C. SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = 250 μA 500 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.
PAGE 3
IRFPS40N50L, SiHFPS40N50L Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 1000 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 100 I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP 100 10 1 4.5V 0.1 20μs PULSE WIDTH TJ = 25 °C 0.01 0.1 1 10 10 TJ = 25 ° C 1 0.1 100 VDS , Drain-to-Source Voltage (V) RDS(on) , Drain-to-Source On Resistance (Normalized) VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM4.
PAGE 4
IRFPS40N50L, SiHFPS40N50L Vishay Siliconix VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd C, Capacitance(pF) 100000 Coss = Cds + Cgd 10000 Ciss 1000 Coss 100 Crss VGS , Gate-to-Source Voltage (V) 20 1000000 ID = 47A V DS= 400V V DS= 250V V DS= 100V 15 10 5 10 1 10 100 0 1000 0 VDS, Drain-to-Source Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 40 200 300 400 Fig. 7 - Typical Gate Charge vs.
PAGE 5
IRFPS40N50L, SiHFPS40N50L Vishay Siliconix RD VDS 50 VGS 40 ID , Drain Current (A) D.U.T. RG + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 30 Fig. 10a - Switching Time Test Circuit 20 VDS 90 % 10 0 25 50 75 100 125 150 10 % VGS TC , Case Temperature ( °C) td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response(Z thJC ) 1 0.1 D = 0.50 0.01 0.20 0.10 0.05 0.02 0.01 0.001 0.
PAGE 6
IRFPS40N50L, SiHFPS40N50L Vishay Siliconix EAS , Single Pulse Avalanche Energy (mJ) 2000 15 V TOP BOTTOM ID 21A 30A 46A 1500 Driver L VDS D.U.T. RG IAS 20 V tp 1000 + A - VDD 0.01 Ω Fig. 12a - Unclamped Inductive Test Circuit VDS 500 0 25 50 75 100 125 150 Starting TJ , Junction Temperature( °C) tp Fig. 12d - Maximum Safe Operating Area Current regulator Same type as D.U.T. IAS 50 kΩ 12 V Fig. 12b - Unclamped Inductive Waveforms 0.2 µF 0.3 µF + D.U.T.
PAGE 7
IRFPS40N50L, SiHFPS40N50L Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T.
PAGE 8
Package Information Vishay Siliconix TO-274AA (HIGH VOLTAGE) B A E E4 A D2 E1 A1 R D1 D L1 L Detail “A” C b e A2 0.10 (0.25) M B A M 10° b4 b2 Lead Tip 5° Detail “A” Scale: 2:1 MILLIMETERS DIM. MIN. MAX. INCHES MIN. MAX. MILLIMETERS DIM. MIN. MAX. INCHES MIN. MAX. A 4.70 5.30 0.185 0.209 D1 15.50 16.10 0.610 0.634 A1 1.50 2.50 0.059 0.098 D2 0.70 1.30 0.028 0.051 A2 2.25 2.65 0.089 0.104 E 15.10 16.10 0.594 0.634 b 1.30 1.60 0.051 0.
PAGE 9
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