Datasheet

ManualsBrandsVISHAY ManualsFETsIRFB18N50KPBF, MOSFET N channel 17A 500V

Document Number: 91100 www.vishay.com

S09-0015-Rev. A, 19-Jan-09 1

Power MOSFET

IRFB18N50K, SiHFB18N50K

Vishay Siliconix

FEATURES

• Low Gate Charge Q

Results in Simple Drive

Requirement

• Improved Gate, Avalanche and Dynamic dV/dt

Ruggedness

• Fully Characterized Capacitance and Avalanche Voltage

and Current

•Low R

DS(on)

• Lead (Pb)-free Available

APPLICATIONS

• Switch Mode Power Supply (SMPS)

• Uninterruptible Power Supply

• High Speed Power Switching

• Hard Switched and High Frequency Circuits

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature.

b. Starting T

= 25 °C, L = 2.5 mH, R

= 25 Ω, I

= 17 A.

c. I

≤ 17 A, dI/dt ≤ 376 A/µs, V

≤ V

, T

≤ 150 °C.

d. 1.6 mm from case.

PRODUCT SUMMARY

(V) 500

DS(on)

(Ω)V

= 10 V 0.26

(Max.) (nC) 120

(nC) 34

(nC) 54

Configuration Single

N-Channel MOSFET

TO-220

Available

RoHS*

COMPLIANT

ORDERING INFORMATION

Package TO-220

Lead (Pb)-free

IRFB18N50KPbF

SiHFB18N50K-E3

SnPb

IRFB18N50K

SiHFB18N50K

ABSOLUTE MAXIMUM RATINGS T

= 25 °C, unless otherwise noted

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V

500

Gate-Source Voltage V

± 30

Continuous Drain Current V

at 10 V

= 25 °C

= 100 °C 11

Pulsed Drain Current

Linear Derating Factor 1.8 W/°C

Single Pulse Avalanche Energy

370 mJ

Repetitive Avalanche Current

17 A

Repetitive Avalanche Energy

22 mJ

Maximum Power Dissipation T

= 25 °C P

220 W

Peak Diode Recovery dV/dt

dV/dt 7.8 V/ns

Operating Junction and Storage Temperature Range T

, T

stg

- 55 to + 150

°C

Soldering Recommendations (Peak Temperature) for 10 s 300

Mounting Torque 6-32 or M3 screw 10 N

* Pb containing terminations are not RoHS compliant, exemptions may apply

Summary of content (9 pages)

PAGE 1
IRFB18N50K, SiHFB18N50K Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Low Gate Charge Qg Results in Simple Drive Requirement 500 RDS(on) (Ω) VGS = 10 V 0.26 Qg (Max.
PAGE 2
IRFB18N50K, SiHFB18N50K Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum SYMBOL Junction-to-Ambienta Case-to-Sink, Flat, Greased Surface Maximum Junction-to-Case (Drain)a TYP. MAX. RthJA - 58 RthCS 0.50 - RthJC - 0.56 UNIT °C/W Note a. Rth is measured at TJ approximately 90 °C. SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = 250 µA 500 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.
PAGE 3
IRFB18N50K, SiHFB18N50K Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 100.00 10 1 VGS TOP 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 0.1 ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 100 5.0V 0.01 TJ = 150°C 10.00 1.00 TJ = 25°C 0.10 20µs PULSE WIDTH Tj = 25°C VDS = 100V 20µs PULSE WIDTH 0.01 0.001 0.1 1 10 5.0 100 VDS, Drain-to-Source Voltage (V) Fig.
PAGE 4
IRFB18N50K, SiHFB18N50K Vishay Siliconix VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd C, Capacitance(pF) 10000 Ciss 1000 Coss 100 ISD , Reverse Drain Current (A) 100 100000 TJ = 150 ° C 10 TJ = 25 ° C 1 Crss 10 1 10 100 1000 VDS, Drain-to-Source Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage ID = 17A 16 V GS = 0 V 0.5 0.8 1.1 1.4 VSD ,Source-to-Drain Voltage (V) Fig.
PAGE 5
IRFB18N50K, SiHFB18N50K Vishay Siliconix RD VDS 20 VGS D.U.T. ID , Drain Current (A) RG + - VDD 15 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 10 Fig. 10a - Switching Time Test Circuit VDS 5 0 90 % 25 50 75 100 125 150 10 % VGS TC , Case Temperature ( °C) td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response(Z thJC ) 1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM 0.
PAGE 6
IRFB18N50K, SiHFB18N50K EAS , Single Pulse Avalanche Energy (mJ) Vishay Siliconix 750 ID 7.6A 11A BOTTOM 17A TOP 600 450 300 150 0 25 50 75 100 125 150 Starting T J, Junction Temperature ( ° C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG VGS 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform www.vishay.com 6 Fig.
PAGE 7
IRFB18N50K, SiHFB18N50K Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - • • • • RG dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test Driver gate drive P.W. + Period D= + - VDD P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T.
PAGE 8
Package Information www.vishay.com Vishay Siliconix TO-220-1 A E DIM. Q H(1) D 3 2 L(1) 1 M* L b(1) INCHES MIN. MAX. MIN. MAX. A 4.14 4.70 0.163 0.185 b 0.69 1.02 0.027 0.040 b(1) 1.14 1.78 0.045 0.070 F ØP MILLIMETERS c 0.36 0.61 0.014 0.024 D 14.32 15.86 0.564 0.624 E 9.96 10.52 0.392 0.414 e 2.41 2.67 0.095 0.105 e(1) 4.88 5.28 0.192 0.208 F 0.51 1.40 0.020 0.055 H(1) 6.10 6.70 0.240 0.264 0.115 J(1) 2.41 2.92 0.095 L 13.36 14.
PAGE 9
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