RE_240-1CA20

Manual VIPA System 200V Chapter 3 Deployment

HB97E - CP - RE_240-1CA20 - Rev. 12/42 3-27

The CPU has to split the telegram to send into blocks of 12Byte and

transfer them via the back plane bus to the CP 240. In the CP 240 these

blocks are assembled in the send buffer, proofed for completeness and

then sent to the serial interface.

For the data transfer via the back plane bus is asynchronous, a "software

handshake" is used between the CP 240 and the CPU. The register for the

data transfer from the CP 240 has a width of 16Byte. The bytes 0 to 3

(word 0 and 2) are reserved for the handshake.

The following picture illustrates this:

V-Bus

REC

SEND

OUT

Byte 15

. . .

Bte4

Byte 2/3

Byte 0/1

Byte 15

. . .

Byte 2/3

Byte 0/1

Byte 4

Soft handshake via Byte 0 ... 3

TxD Cnt

RxD Cnt

TxD Cnt

RxD Cnt

RS232

RS485

RS422/485

TxD

RxD

CP 240

Ring buffer max. 250

telegrams

1024Byte

FIFO

1024Byte

FIFO

REC

Tasks of the CPU