Technical Report Best Practices for Connecting Violin Memory Arrays to IBM AIX and PowerVM Host Attachment Guidelines for Using Violin Memory Arrays with IBM AIX and PowerVM through Fibre Channel Connections Version 1.1 Abstract This technical report describes best practices and host attachment procedures for connecting Violin flash Memory Arrays through Fibre Channel to systems running on the IBM AIX operating system with IBM PowerVM virtualization.
Connecting Violin Memory Arrays to IBM AIX and PowerVM Table of Contents 1 Introduction ........................................................................................................................ 3 1.1 Intended Audience ......................................................................................................... 3 1.2 Additional Resources ..................................................................................................... 3 2 Planning for AIX Installation .......
Connecting Violin Memory Arrays to IBM AIX and PowerVM 1 Introduction This technical report describes best practice recommendations and host attachment procedures for connecting Violin arrays through Fibre Channel to systems running on the IBM AIX operating system with IBM PowerVM virtualization. The information in this report is designed to follow the actual process of connecting Violin arrays to AIX systems. This document covers the information listed below: • AIX 6.1 • AIX 7.1 • AIX 5.
Connecting Violin Memory Arrays to IBM AIX and PowerVM 2 Planning for AIX Installation This section covers AIX platform-specific prerequisites required for a clean and successful install. 2.1 Gateway and Array Firmware The below are the minimum supported levels for Array and Gateway Code levels for AIX Platform: 3000 6000 Minimum Recommended Array Code Level A5.1.5 A5.5.1 HF1* Minimum Recommended Gateway Code Level G5.5.1 G5.5.1 Violin Array Model ------------------------------------> vMOS 6.
Connecting Violin Memory Arrays to IBM AIX and PowerVM 3 Fibre Channel Best Practices Host attach of Violin Storage to AIX Partitions is supported via the methods listed below: • Direct Attach • FC SAN Attach 3.1 Direct Attach Topology In the topology shown in Figure 1, the host partition’s HBAs are directly connected to a Violin target. There is no SAN switch in the topology. To achieve optimal high availability, we need to make sure we attach each HBA to a unique gateway for high availability.
Connecting Violin Memory Arrays to IBM AIX and PowerVM 3.2 Fibre Channel SAN Topology In the topology shown in Figure 2, the Host Partition’s HBAs are directly connected to a Violin Target via a Fiber Channel SAN. To achieve optimal high availability, we need to make sure zone to each HBA port to each gateway (MG) for High Availability. Multiple Hosts can be attached to the Violin Array in this configuration. The below diagram shows one host attached to the fabric.
Connecting Violin Memory Arrays to IBM AIX and PowerVM This is a fully redundant configuration that can survive SAN failures, Gateway (Controller) failures, and HBA failures. The Guest LPAR has 2 Virtual HBAs configured off each VIO Partition. Each VIO partition has two physical HBA ports, each connecting to a unique Fabric that is in turned zoned to both the Gateways.
Connecting Violin Memory Arrays to IBM AIX and PowerVM 3.4 SAN Configuration and Zoning The following best practices are recommended: • Set the SAN topology to Point-to-Point • Set the port speed of the Switch port to 8 GB for Violin Targets • On Brocade 8 GB Switches, please set the fillword setting to 3 for ports connected to Violin Targets. # portcfgfillword 3 3.4.1 Zoning Best Practices • Configure WWPN based zoning or WWPN based Aliases • Limit HBA ports (Initiators) in a zone to one.
Connecting Violin Memory Arrays to IBM AIX and PowerVM 4 Virtual IO (VIO Partitions) IBM PowerVM Supports N Port Virtualization (NPIV) with 8 GB host bus adapters. NPIV allows us to virtualize a port on a Fibre Channel switch. An NPIV-capable FC HBA can have multiple N_Ports, each with a unique virtual WWPN. NPIV with the Virtual I/O Server (VIOS) adapter sharing capabilities allow a physical FC HBA to be shared across multiple guest LPARs .
Connecting Violin Memory Arrays to IBM AIX and PowerVM 5 Storage Configuration NOTE: This LUN configuration is identical for MPIO and DMP. 5.1 10 LUN Creation 1. Log into the Array GUI IP/hostname of the Gateway and login as admin 2. Click on “Manage” and this will drop you directly into LUN management Screen. 3. Create new LUNS: Click on the + sign to create new LUNS in the container. This opens up a dialog box to create new LUNS. www.vmem.
Connecting Violin Memory Arrays to IBM AIX and PowerVM 4. 11 Select no of LUNs, unique names for LUNS, size for LUNS in Gigabytes, block size=512 bytes ( 4 K Block size is not supported on AIX), select NACA ( vMOS 5.5.2 and higher). Note: Thin Provisioning is not supported with vMOS 5.x. www.vmem.
Connecting Violin Memory Arrays to IBM AIX and PowerVM 5.2 Setting NACA Bit per LUN using command-line ( vMOS 5.5.1 and below) 1. Setting NACA bit for AIX LUNS: vMOS 5.5.1 does not expose NACA bit from the GUI and has to be set from the command-line. Login to the Cluster IP address of the Gateway using PUTTY(ssh) and username=admin. 12 2. Change mode to privileged user 3. Display LUNS for NACA Bit ( this displays all the LUNS on the array ). NACA bit should be 1 for all AIX LUNS. 4.
Connecting Violin Memory Arrays to IBM AIX and PowerVM 5. Change NACA bit for all the LUNS you plan to export on AIX Hosts and check that it is successful on the LUNS that you want. 6. Save the NACA bit settings # write mem 5.3 Initiator Group Creation Note: If setting up a VIO environment, it is recommended to set up separate Initiator Groups for LPAR boot LUNS (one per LPAR) and data LUNS (one per cluster). 1. Create IGROUP.
Connecting Violin Memory Arrays to IBM AIX and PowerVM 5.4 14 LUN Export to Initiator Group 1. Export LUNS to the IGroup by selecting them from the checkboxes and click on “export Checked LUNS.” 2. Select your initiator group and click “OK.” 3. Save your configuration by committing changes by clicking on COMMIT CHANGES at the top right hand side of the screen. www.vmem.
Connecting Violin Memory Arrays to IBM AIX and PowerVM 6 LPAR/Host Configuration Please follow the steps provide in this section for LPAR/host configuration. 6.1 Multi-Pathing Driver Considerations Violin supports two multi-path options on AIX: • IBM MPIO • Symantec VERITAS DMP NOTE : MPIO and DMP can coexist with EMC Powerpath on AIX Violin 3000 and 6000 Arrays are supported with IBM MPIO on AIX. Violin distributes a path control module (PCM) that supports IBM MPIO as an Active/Active Target.
Connecting Violin Memory Arrays to IBM AIX and PowerVM NOTE: It is required to reboot the LPAR to make the above settings effective. 6.3 MPIO Fileset Installation Download the Violin MPIO filesets from http://violin-memory.com/support after logging in with you user id. Depending on the version of AIX you are using, you need to install the appropriate library. AIX 7.1 7.1.0.3devices.fcp.disk.vmem AIX 6.1 6.1.0.3devices.fcp.disk.vmem AIX 5.3 5.3.0.3devices.fcp.disk.vmem 6.3.1 Installing the PCM 1.
Connecting Violin Memory Arrays to IBM AIX and PowerVM 6.4 LUN Discovery After creating LUNS and exporting them to the appropriate Initiator groups, you can discover LUNS inside the guest LPAR using cfgmgr. # cfgmgr 1.
Connecting Violin Memory Arrays to IBM AIX and PowerVM 7 Discovering LUN and Enclosure Serial no on AIX The vMOS code level , LUN serial no and Array/Enclosure Serial no can be determined by the following command as shown below: # lscfg -vpl hdisk29 hdisk29 U78AB.001.WZSHR28-P1-C2-T1-W21000024FF35B691-LB000000000000 MPIO VIOLIN Fibre Channel disk Manufacturer................VIOLIN Machine Type and Model......SAN ARRAY EC Level....................551 <= vMOS level Device Specific.(Z0)........
Connecting Violin Memory Arrays to IBM AIX and PowerVM 8 Deploying Multipathing with DMP If you need more information about SYMANTEC Storage Foundatio, visit: http://www.symantec.com/storagefoundation 8.1 Obtaining DMP Binaries Storage Foundation can be downloaded from Symantec web site: https://www4.symantec.com/Vrt/offer?a_id=24928 The Array Support Library support package for Violin is available from Symantec as well: https://sort.symantec.
Connecting Violin Memory Arrays to IBM AIX and PowerVM 3. Please select Option 3 ,4, or 5 depending on which stack you want to install and follow the steps as instructed by the installer. 4. Reboot the host if required ( prompted by the installer ). 5. Run an installer post-check. # ./installer –postcheck `uname-n` 8.4.2 Array Support Library for DMP 1. Install Array Support Library (ASL) package for Violin Storage Arrays. 2. Download the latest AIX package from https://sort.symantec.
Connecting Violin Memory Arrays to IBM AIX and PowerVM If the Array is not recognized as a VMEM enclosure this means that the Array Support library for Violin Storage is not installed on the server. This can be verified by running the below command. If this command returns null, then please check if ASL update package is installed for Violin Arrays and contact Symantec Support if required. # vxddladm listsupport | grep -i violin libvxviolin.
Connecting Violin Memory Arrays to IBM AIX and PowerVM 8.4.6 Setting Queue Depth for AIX LUNs Discovered At this time, Violin does not ship ODM predefines for the Violin Array for DMP. As a result, LUN queue depth needs to be set for each of the LUNs discovered by Violin Array. Violin provides a script for this purpose. Please copy and paste this into a shell script and execute it.
About Violin Memory Violin Memory is pioneering a new class of high-performance flash-based storage systems that are designed to bring storage performance in-line with high-speed applications, servers and networks.
