Service manual
Table Of Contents
- VIZIO L42HDTV10A,GV42L_HDTV Service Manual
- 01-FEATURES
- 02-SPECIFITION
- 03-ON SCREEN DISPLAY
- 04-FACTORY PRESET TIMINGS
- 05-PIN ASSIGNMENT
- 06-MAIN BOARD I/O CONNECTIONS
- 07-THEORY OF CIRCUIT OPERATION
- 08-WAVEFORMS
- 09-TROUBLE SHOOTING
- 10-BLOCK DIAGRAM
- 11-SPARE PATRS LIST
- 12-1COMPLETE PARTS LIST_FOR L42 HDTV10A
- 12-2COMPLETE PARTS LIST_FOR GV42L HDTV
- MAIN BOARD CIRCUIT DIAGRAM_FOR L42 HDTV10A
- MIAN BOARD CIRCUIT DIAGRAM_FOR GV42L HDTV
- MAIN BOARD PCB LAYOUT_FOR L42HDTV10A(LG/AUO)
- MAIN BOARD PCB LAYOUT_FOR GV42L HDTV_LG
- ASSEMBLY EXPLOSION DRAWING_FOR L42HDTV10A_AUO
- ASSEMBLY EXPLOSION DRAWING_FOR L42HDTV10A_LG
- ASSEMBLY EXPLOSION DRAWING_FOR GV42L HDTV_LG
CONFIDENTIAL – DO NOT COPY
Page 7-48
File No. SG-0198
Mode Register Operation
Operating Mode
The normal operating mode is selected by issuing a Mode Register Set Command with bits A7-A12
to zero, and bits A0-A6 set to the desired values. A DLL reset is initiated by issuing a Mode Register
Set command with bits A7 and A9-A12 each set to zero, bit A8 set to one, and bits A0-A6 set to the
desired values. A Mode Register Set command issued to reset the DLL should always be followed
by a Mode Register Set command to select normal operating mode.
All other combinations of values for A7-A12 are reserved for future use and/or test modes. Test
modes and reserved states should not be used as unknown operation or incompatibility with future
versions may result.