Service manual
Table Of Contents
- VIZIO L42HDTV10A,GV42L_HDTV Service Manual
- 01-FEATURES
- 02-SPECIFITION
- 03-ON SCREEN DISPLAY
- 04-FACTORY PRESET TIMINGS
- 05-PIN ASSIGNMENT
- 06-MAIN BOARD I/O CONNECTIONS
- 07-THEORY OF CIRCUIT OPERATION
- 08-WAVEFORMS
- 09-TROUBLE SHOOTING
- 10-BLOCK DIAGRAM
- 11-SPARE PATRS LIST
- 12-1COMPLETE PARTS LIST_FOR L42 HDTV10A
- 12-2COMPLETE PARTS LIST_FOR GV42L HDTV
- MAIN BOARD CIRCUIT DIAGRAM_FOR L42 HDTV10A
- MIAN BOARD CIRCUIT DIAGRAM_FOR GV42L HDTV
- MAIN BOARD PCB LAYOUT_FOR L42HDTV10A(LG/AUO)
- MAIN BOARD PCB LAYOUT_FOR GV42L HDTV_LG
- ASSEMBLY EXPLOSION DRAWING_FOR L42HDTV10A_AUO
- ASSEMBLY EXPLOSION DRAWING_FOR L42HDTV10A_LG
- ASSEMBLY EXPLOSION DRAWING_FOR GV42L HDTV_LG
CONFIDENTIAL – DO NOT COPY
Page 7-8
File No. SG-0198
6.Seamless performance comparing demonstration function
Support Left/Right video processing comparing function without additional resources (DRAM…)
for customers’ demonstration
All the video functions (De-interlace/3D comb/NR/Flesh tone/CTI) can be included
7. DRAM Usage
1.For features of 8202, Dual for enhance features support, and single 8x16 DDR for
simple function support Lists are the comparison chart between function support lists
of (2xDDR) and (1xDDR)
2.For single DDR, 8202 only support 1080i bob mode de-interlacing. (Non-3D de interlace)
3.With single DDR, it is suggested not to support PIP/POP features. Due to DDR Bandwidth
limitation on PIP/POP when single DDR.