Service manual

CIRCUIT DESCRIPTION
5-11
April 2001
Part No. 001-9800-203
5.5.4 TRANSMIT DATA CIRCUIT (U302D,
U302A)
The transmit LTR data and Call Guard tone/data
signals are generated by the microcontroller on pins 37
and 38. The four logic combinations possible with
these two outputs are applied to a resistor network
consisting of R389, R392, R386, and R395. This
network creates a four-step pseudo sine wave from the
digital outputs. This signal is applied to a low-pass
filter formed by U302D and U302A. This filter attenu-
ates harmonics present in the signal which provides
smoothing of the stepped sine wave.
The passband of this filter is controlled by Q306
which switches additional capacitance into the circuit.
When LTR or digital Call Guard data or low-
frequency tone Call Guard signaling is being trans-
mitted, Q306 is turned on and the cut-off frequency
decreases to approximately 150 Hz. Then when a
high-frequency tone Call Guard signal is being trans-
mitted, Q306 is turned off and the cut-off frequency
increases to approximately 220 Hz. Q306 is controlled
by the same signal used to control Q300 in the receive
data circuit (see Section 5.4.3).
U308C provides gating of the transmit data
signal. When the control input (pin 6) is high, the gate
is closed and the signal is passed. Test gate U307A is
used in the test mode to bypass the data filter to
provide the wideband data signal required for setting
modulation balance. Q303 and Q308 provide level
translation and inversion. The transmit data signal is
then fed to digital potentiometer U802 on the RF
board which sets the data deviation level. Refer to
Section 5.7.4 for more information.
5.6 DISPLAY BOARDS
Low Tier Display Board
The low tier display board contains a 1.5-digit
LED display and driver circuit and also circuitry
which converts key press information into serial data.
Display DS1 is a standard seven-segment display with
decimal point. Display DS2 has only “b” and “c”
segments to display “1” and also decimal point, “+”,
and “–” indicators. The common cathode of the
internal LEDs is pins 1 and 6.
Display driver U2 controls displays DS1 and DS2
and also LEDs CR1-CR3. Display data is loaded into
U2 serially on the Data line (pin 5). It is clocked in by
a high-to-low transition on the Clock line (pin 15). The
data is latched when the Enable
line (pin 14) goes
high.
Since several devices are controlled by the same
output lines of U2, the display is multiplexed which
means that DS2, DS1, and CR1-CR3 are enabled indi-
vidually by a high pulse on digital enable outputs II,
III, and IV (I is not used). A non-overlapping clock
enables each output in succession. Therefore, each is
enabled one-fourth of the time. The frequency of this
clock is determined by C6, and the refresh rate is made
high enough to ensure that no flickering is noticed.
Encoder U1 produces a three-bit output code
which indicates which of the eight switches on the
inputs are pressed. For example, if input D0 is pulled
high by pressing the AUX2 switch, 001 appears on the
Q2-Q0 outputs. The three-bit parallel output of U1 is
then converted to serial data by parallel-serial
converter U3 so that it can be read by the microcon-
troller using the SPI serial bus. The microphone
hanger signal is applied to the D6 input of U3 and read
with the switch information.
High Tier Display Board
Control of most display board functions is
provided by microcontroller U2. This device contains
a 2K byte ROM and 128 byte RAM and has 20 I/O
lines. It communicates with microcontroller U101 on
the audio/logic board via the SPI serial bus consisting
of SCK, MOSI, and MISO lines (see Section 5.3.1).
When there is data to send to the audio/logic board,
such as if an option switch is pressed, U2 issues a
service request on the Service Request Out line (J1,
pin 6).
The functions controlled by U2 are as follows:
Display controller U1 programming
Backlight control
Transmit/Busy indicator CR4 control
Front panel option switch detection
Front panel Select switch detection
Microphone hanger off-hook detection.
DISPLAY DESCRIPTION