User manual

Viglen BX130 – VIG385P User Manual
40
Port 80h POST Codes
During the POST, the BIOS generates diagnostic progress codes (POST codes) to
I/O port 80h. If the POST fails, execution stops and the last POST code generated is
left at port 80h. This code is useful for determining the point where an error occurred.
Displaying the POST codes requires an add-in card (often called a POST card). The
POST card can decode the port and display the contents on a medium such as a
seven-segment display.
The following table provides the POST codes that can be generated by the BIOS.
Some codes are repeated in the table because that code applies to more than one
operation.
Table 6: Port 80h Codes
Code Description of POST Operation
02h Reserved
03h Initial Superio_Early_Init switch.
04h Reserved
05h 1. Blank out screen
2. Clear CMOS error flag
06h Reserved
07h 1. Clear 8042 interface
2. Initialize 8042 self-test
08h 1. Test special keyboard controller for Winbond 977 series
Super I/O chips.
2. Enable keyboard interface.
09h Reserved.
0Ah 1. Disable PS/2 mouse interface (optional).
2. Auto detect ports for keyboard & mouse followed by a port
& interface swap(optional).
3. Reset keyboard for Winbond 977 series Super I/O chips.
0Bh Reserved
0Ch Reserved
0Dh Reserved
0Eh Test F000h segment shadow to see whether it is R/W-able or not.
Iftest fails, keep beeping the speaker.
0Fh Reserved
10h Auto detect flash type to load appropriate flash R/W codes into
therun time area in F000 for ESCD & DMI support.
11h Reserved
12h Use walking 1’s algorithm to check out interface in CMOS
circuitry. Also set real-time clock power status, and then check for
override.
13h Reserved
14h Program chipset default values into chipset. Chipset default
values are MODBINable by OEM customers.
15h Reserved
16h Initial Early_Init_Onboard_Generator switch.
17h Reserved
18h Detect CPU information including brand, SMI type (Cyrix or
Intel) and CPU level (586 or 686).
19h Reserved