Service manual

1.5 DDC 1/2 B

IC600 (24LC02) & IC602 (24LC21A) can continuously transmit its extended identification,

“EDID” using DDC1 communication channel. In addition, the monitor can respond to a request for

EDID, or complete VDIF, to be transmitted using DDC2, level B commands. Pin6 SCL is clock input

for DDC 2B, pin5 SDA for data input, and pin7 VCLK is clock input for DDC1.

In DDC1 data transfer (UNI-directional mode), the VCLK input pin is used as an input clock

for data transmission and SDA output pin is used as serial data line the SCL pin will hold high.

The DDC2B node (BI-directional mode) BUS consists of two wires. SCL is for the data

transmission clock and SDA is for the data line.

2. Audio Board

2.1 Audio processor

ICA2 (PT2313L) is a four-channel digital audio processor utilizing

CMOS Technology .Volume, Bass, Treble, Balance, Front/Rear

Fader Processor are incorporated into a single chip. Loudness function and

Selectable input gain are also provided to build a highly effective electronic

Audio processor having the highest performance and reliability with the

Least external components. And all functions are programmable using the

IIC BUS

PIN# PIN NAME I/O DESCRIPTION

1 REF - Analog reference voltage(1/2 VDD)

2 VDD - Supply input voltage

3 Agnd - Analog ground

4 Treb_L I Left channel input for treble control

5 Treb_R I Right channel input for treble control

6 RIN I Audio processor right channel input

7 Rout O Gain output & input selector for right channel

8 Loud_R I Right channel loudness input

9 Rin 3 I Right channel input 3

10 Rin 2 I Right channel input 2

11 Rin 1 I Right channel input 1

12 Loud_L I Left channel loudness input

13 Lin 3 I Light channel input 3

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