Service manual

119 TCON [6] /
V [5]
V [5] V [5] DHS DHS DHS (1), (7), (8)
122 TCON [5] /
V [6]
V [6] V [6] DVS DVS DVS (1), (7), (8)
123 TCON [1] /
V [7]
V [7] V [7] DENA DENA DENA (1), (7), (8)
124 TCON [0] /
VCLK
VCLK VCLK DCLK DCLK DCLK (1), (7), (8)
*Single RSDS, even/odd swap, data (59~82) output to pin85~108, TCON (99~108) output to pin59~68.
*In 6-bit dual TTL output mode, Video8 cannot output TCON7~TCON11; while video8 can output TCON in
6-bit single TTL mode.
■ TMDS: 18 pins
Name I/O Pin No Description Note
TMDS_TST/ PWM1 AIO 9 TMDS_TEST Pin / PWM1 / Power-on-latch
for serial / parallel port
TMDS_GND G 10
TMDS_VDD P 11 (3.3V)
NC A 12 Impedance Match Reference.
TMDS_VDD P 13 (3.3V)
NC I 14 Differential Data Input
NC I 15 Differential Data Input
TMDS_GND G 16
NC I 17 Differential Data Input
NC I 18 Differential Data Input
TMDS_VDD P 19 (3.3V)
NC I 20 Differential Data Input
NC I 21 Differential Data Input
TMDS_GND G 22
NC I 23 Differential Data Input
NC I 24 Differential Data Input
TMDS_GND G 25
TMDS_VDD P 26 (3.3V)
■ PWM Interface: (PWM1, PWM2 can be selected from 1 of 3 possible pins.)
Name I/O Pin No Description Note
PWM2 / TCON [2] / S
[3]
O 51 PWM2 / TCON [2] / SDIO [3] (1), (2), (3), (5),
(8),
PWM2 / TCON [13] /
COUT
O 55 PWM2 / TCON [13] / Crystal out (2), (8), (9)
PWM2 / TCON [12] /
COUT
O 113 PWM2 / TCON [12] / Crystal out (2), (8), (9) 6bit
dual TTL cannot
support
PWM1 / TMDS_TST AIO 9 PWM1/ TMDS_TEST Pin/ Power-on-latch
for serial / parallel port
(2), (7), (8)
PWM1 / DDCSDA /
TCON [1] / BBLU [0]
IO 47 PWM1 / DDC serial control I/F data input /
output / TCON [4]
(1), (2), (3), (5),
(8),
PWM1 / TCON [7] IO 125 PWM1 / TCON [7] (1), (2), (3), (5),
(8),
PWM0 / REFCLK IO 112 PWM0 / (In / out) test pin for DCLK /
Video8 even-odd signal
(2), (9)
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