Product specifications

VT8601A Apollo PLE133
Revision 1.82 October 22, 2001 -84- VGA Extended Registers
Technologies, Inc.
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VGA Extended Registers – Graphics Controller Indexed
GRE – Old Source Segment Address ...............................RW
7-3 Reserved .........................................always reads 0
2-1 Source Segment Address Select...............default = 0
0 Reserved .........................................always reads 0
GRE – New Source Segment Address..............................RW
7 Reserved .........................................always reads 0
6-0 Source Segment Address Select...............default = 0
Bit-1 is written inverted
GRF – Miscellaneous Extended Function Control.........RW
7 Reserved ......................................... always reads 0
6 Character Clock Division Control Bit-1 (see bit-3)
00 No division..............................................default
01 Divide by 2
10 Divide by 3
11 -reserved-
5 Symmetric / Asymmetric DRAM Address
0 Symmetric...............................................default
1 Asymmetric
4 Compressed Chain 4 Mode for CPU Path
0 Disable ....................................................default
1 Enable
3 Character Clock Division Control Bit-0 (see bit-6)
2 Alternate Bank & Clock Select
0 Disable 3D8, 3D9, and 3xB....................default
1 Enable 3D8, 3D9, and 3xB
1 Compressed Chain 4 Mode Display Path
0 Disable ....................................................default
1 Enable
0 Source Segment Address Register Enable
0 Disable GRE ...........................................default
1 Enable GRE
All bits except 2 and 0 are write protected by SRE_New[7]