Product specifications

VT8601A Apollo PLE133
Revision 1.82 October 22, 2001 -69- VGA Registers
Technologies, Inc.
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Attribute Controller Registers (AR)
For this indexed register group, the index is accessed at 3C0 as
expected. However, although data operations can be
performed using port 3C1 in the standard way, data is
generally accessed at 3C0 as well. In other words, data and
address are accessed on alternate operations to 3C0 with an
internal flag to keep track of where the next operation is to be
performed. The state of the internal flag may be read back in
the extended registers (see CR24). To set the internal flag to
select the index (i.e., to set the flag so that the next access to
port 3C0h points to the index register), read port 3BAh or
3DAh (depending on the state of the color / mono bit in the
Miscellaneous Output Register at 3C2[0]). Attribute
Controller register data may be read at 3C1 (the internal flag is
not toggled) but must be written at 3C0.
Port 3C0 – VGA Attribute Controller Index...................RW
7-6 Reserved .........................................always reads 0
5 Palette Address Source
4-0 Attribute Controller Index
Only the lower 5 bits are implemented to allow
access to Attribute Controller registers 0-14h.
Port 3C0/3C1 Index 0-F – Attr Ctrlr Color Palette........RW
7-6 Reserved .........................................always reads 0
5-0 Color Value
Port 3C0/3C1 Index 10 – Attr Ctrlr Mode Control........RW
7 P5 / P4 Select
6 Pixel Width
5 Pixel Panning Compatibility
4 Reserved .........................................always reads 0
3 Select Background Intensity or Enable Blink
2 Enable Line Graphics Character Mode
1 Display Type
0 Graphics / Text Mode
Port 3C0/3C1 Index 11 – Attr Ctrlr Overscan Color .....RW
7-0 Overscan Color
Port 3C0/3C1 Index 12 – Attr Ctrlr Color Plane Ena....RW
7-6 Reserved .........................................always reads 0
5-4 Video Status Mux
3-0 Color Plane Enable for Color Planes 3-0
Port 3C0/3C1 Index 13 – Attr Ctrlr H Pixel Panning ....RW
7-4 Reserved .........................................always reads 0
3-0 Horizontal Pixel Pan
Port 3C0/3C1 Index 14 – Attr Ctrlr Color Select ...........RW
7-4 Reserved .........................................always reads 0
3-0 Color Select Bits 7-4
VGA Status / Enable Registers
Port 3C2 – VGA Input Status 0.........................................RO
7 Vertical Retrace Interrupt Pending
6-5 Reserved .........................................always reads 0
4 Switch Sense
3-0 Reserved .........................................always reads 0
Port 3xA – VGA Input Status 1.........................................RO
This register is accessible at either 3BA or 3DA (shorthand
notation 3xA) depending on the setting of Miscellaneous
Output Register at 3C2[0].
7-6 Reserved .........................................always reads 0
5-4 Diagnostic
3 Vertical Retrace
2-1 Reserved .........................................always reads 0
0 Display Enable (Inverted)
Port 3C2 – VGA Miscellaneous Output Register (Write)WO
Port 3CC – VGA Miscellaneous Output Register (Read)RO
7 Vertical Sync Polarity
6 Horizontal Sync Polarity
5 Page Bit for Odd / Even
4 Reserved .........................................always reads 0
3-2 Clock Select
1 Enable RAM
0 I/O Address Select
0 CRTC registers at 3Bx, Input Status 1 at 3BA
1 CRTC registers at 3Dx, Input Status 1 at 3DA
Port 3C3 – VGA Video Subsystem Enable......................RW
7-1 Reserved .........................................always reads 0
0 Video Subsystem Enable
Port 46E8h – VGA Display Adapter Enable...................RW
7-4 Reserved .........................................always reads 0
3 Display Adapter Enable
2-0 Reserved .........................................always reads 0