Product specifications

VT8601A Apollo PLE133
Revision 1.82 October 22, 2001 -1- Product Features
Technologies, Inc.
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VIA VT8601A
Apollo PLE133
133 / 100 / 66 MHz
Single-Chip Socket-370 PCI North Bridge,
With Integrated AGP 2D / 3D Graphics Accelerator
and Advanced Memory Controller
supporting PC133 / PC100 SDRAM
For Desktop PC Systems
P
RODUCT
F
EATURES
•
••
• General
−
510 BGA Package (35mm x 35mm )
− 2.5 Volt core with 3.3V CMOS I/O
− Supports GTL+ I/O buffer Host interface
− Supports separately powered 5.0V tolerant interface to PCI bus and Video interface
− 2.5V, 0.25um, high speed / low power CMOS process
− PC98 / 99 compatible using VIA VT82C686B (352-pin BGA) south bridge chip for Desktop and Mobile
applications
−
133 / 100 / 66 MHz CPU Front Side Bus (FSB) Operation
•
••
• High Integration
−
Single chip implementation for 64-bit Slot-1 and Socket-370 CPUs, 64-bit system memory, 32-bit PCI with
integrated 2D / 3D GUI accelerator
− Apollo PLE133 Chipset: VT8601A system controller and VT82C686B PCI to ISA bridge
− Chipset includes dual UltraDMA-100 / 66 / 33 EIDE, AC-97 link, 4 USB ports, integrated Super-I/O, hardware
monitoring, keyboard / mouse interfaces, and RTC / CMOS
•
••
• High Performance CPU Interface
−
Supports VIA C3 and Intel Celeron
TM
and Pentium III
TM
processors
− 133 / 100 / 66 MHz CPU Front Side Bus (FSB)
−
Built-in PLL (Phase Lock Loop) circuitry for optimal skew control within and between clocking regions
−
Five outstanding transactions (four In-Order Queue (IOQ) plus one input latch)
− Supports WC (Write Combining) cycles
− Dynamic deferred transaction support
− Sleep mode support
− System management interrupt, memory remap and STPCLK mechanism
CPU DRAM GUI Core Internal AGP PCI Comments
133 MHz 133 MHz 100 MHz 66 MHz 33 MHz Synchronous (DRAM uses CPU clock)
133 MHz 100 MHz 100 MHz 66 MHz 33 MHz Pseudo-synchronous (DRAM uses GUI clock)
100 MHz 133 MHz 100 MHz 66 MHz 33 MHz Pseudo-synchronous (DRAM uses GUI clock)
100 MHz 100 MHz 100 MHz 66 MHz 33 MHz Synchronous (DRAM uses CPU clock)
100 MHz 66 MHz 66 MHz 66 MHz 33 MHz Pseudo-synchronous (DRAM uses GUI clock)
66 MHz 100 MHz 100 MHz 66 MHz 33 MHz Pseudo-synchronous (DRAM uses GUI clock)
66 MHz 66 MHz 66 MHz 66 MHz 33 MHz Synchronous (DRAM uses CPU clock)