Product specifications

VT8601A Apollo PLE133
Revision 1.82 October 22, 2001 -35- Device 0 Bus 0 Header Registers - Host Bridge
Technologies, Inc.
Delivering Value
Delivering ValueDelivering Value
Delivering Value
Device 0 Offset E - Header Type....................................... RO
7-0 Header Type Code ............reads 00: single function
Device 0 Offset F - Built In Self Test (BIST) ................... RO
7 BIST Supported ......reads 0: no supported functions
6-0 Reserved .........................................always reads 0
Device 0 Offset 13-10 - Graphics Aperture Base.............RW
31-28 Upper Programmable Base Address Bits.......def=0
27-20 Lower Programmable Base Address Bits.......def=0
These bits behave as if hardwired to 0 if the
corresponding Graphics Aperture Size register bit
(Device 1 Offset 84h) is 0.
27 26 25 24 23 22 21 20 (This Register)
7
6 5 4 3 2 1 0 (Gr Aper Size)
RW RW RW RW RW RW RW RW 1M
RW RW RW RW RW RW RW 0 2M
RW RW RW RW RW RW 0 0 4M
RW RW RW RW RW 0 0 0 8M
RW RW RW RW 0 0 0 0 16M
RW RW RW 0 0 0 0 0 32M
RW RW 0 0 0 0 0 0 64M
RW 0 0 0 0 0 0 0 128M
0 0 0 0 0 0 0 0 256M
19-0 Reserved .................................always reads 00008
Note: The locations in the address range defined by this
register are prefetchable.
Device 0 Offset 2D-2C – Subsystem Vendor ID..............RW
15-0 Subsystem Vendor ID......................... default = 0000
Device 0 Offset 2F-2E – Subsystem ID.............................RW
15-0 Subsystem ID....................................... default = 0000
Device 0 Offset 37-34 - Capability Pointer .......................RO
Contains an offset from the start of configuration space.
31-0 AGP Capability List Pointer ........ always reads A0h