Product specifications

VT8601A Apollo PLE133

Revision 1.82 October 22, 2001 -23- Register Summary Tables

Technologies, Inc.

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REGISTERS

The following tables summarize the configuration and I/O

registers of the PLE133. These tables also document the

power-on default value (“Default”) and access type (“Acc”)

for each register. Access type definitions used are RW

(Read/Write), RO (Read/Only), “—” for reserved / used

(essentially the same as RO), and RWC (or just WC) (Read /

Write 1’s to Clear individual bits). Registers indicated as RW

may have some read/only bits that always read back a fixed

value (usually 0 if unused); registers designated as RWC or

WC may have some read-only or read write bits (see

individual register descriptions following these tables for

details). All offset and default values are shown in

hexadecimal unless otherwise indicated.

Table 2. Register Summary

I/O Ports

Port # I/O Port Default Acc

PCI / AGP Arbiter Disable

CFB

Configuration Address

0000 0000

CFF

Configuration Data

0000 0000