Product specifications

VT8601A Apollo PLE133
Revision 1.82 October 22, 2001 -99- VGA Extended Registers
Technologies, Inc.
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CR8F-8E – Video Display Engine Flags ..........................RW
15 Planar Capture Mode
0 Planar 420 Capture................................. default
1 Planar 422 Capture
14 VSYNC Test / Graphics Engine Reset
0 Disable ................................................... default
1 Enable
13 Edge Recovery Algorithm Control
0 Disable ................................................... default
1 Enable
12 Window 1 Vertical Interpolation
0 Disable ................................................... default
1 Enable
11 Window 1 Horizontal Interpolation
0 Disable ................................................... default
1 Enable
10 CSC / Bypass Select
0 CSC ..................................................... default
1 Bypass
9 Line Toggle for Line Buffer
0 Normal ................................................... default
1 Toggle (Reversed)
8 Reserved .........................................always reads 0
7-5 Window 1 HDEO Delay Adjust...............default = 4
4 Video Window 1
0 Disable ................................................... default
1 Enable
3 CCIR-/ DTV Input Video Data Control
0 CCIR Format.......................................... default
1 DTV Format
2-1 W1 / W2 Line Buffer Page Break Level Control
00 8 levels ................................................... default
01 16 levels
1x 32 levels
0 Video Window 2
0 Disable ................................................... default
1 Enable
CR91-90 – Window 1 / W1-Y Row Byte Offset...............RW
15-14 Reserved .........................................always reads 0
13-0 Video Row Byte Offset
Programmed with the number of bytes in a row
CR94-92 – Window 1 / W1-Y Video Start Address........RW
23-21 Reserved .........................................always reads 0
20 Used with CR97 bit-7
19-0 Video Start Addres (in bytes)
CR95 – Video Window Line Buffer Threshold...............RW
7 Line Buffer Level Bit-8 (used with CR96)
6-0 W1 / W2 Line Buffer Request Threshold Value
When the line buffer is less than this value, a memory
request will be issued. The value programmed in this
register must be less than the line buffer level (see
bit-7 and CR96).
CR96 – Window 1 / W1-Y Line Buffer Level Control ...RW
7-0 Line Buffer Levels (bit-8 is in CR95[7])
RGB8: (pixel # + 2) / 8 rounded up
YUV 4:2:2: (Pixel # + 2) / 4 rounded up
For W1-U or W1-V, the level is this value divided by
4 or 16, depending on the panar format (YUV12 or
YUV9)
CR97 – Video Display Engine Flags.................................RW
7 Start Address Reload Control
0 CR94[4]=0 address can be reloaded any time
1 CR94[4]=0 only reloaded during Vsync
x CR94[4]=1 address not reloaded
6 Video Start Reference Select
0 HSYNC / VSYNC ..................................default
1 Use fixed signals (fixed relationship with HDE
and VDE) as video start reference
5 Address Point Invert
0 Normal ....................................................default
1 Invert
4 Odd / Even Invert (Anti-tearing)
0 Normal ....................................................default
1 Invert
3 Playback Test Mode Select (RGB Data Select)
2 Playback Test Mode
0 Disable ....................................................default
1 Enable
1 Anti-tearing Sync Select
0 VGA Vsync.............................................default
1 Playback Vsync
0 Anti-tearing
0 Disable ....................................................default
1 Enable
This bit is automatically disabled if there is only one
video stream and dual live video mode is enabled. In
this mode, the even field is used for one live video
stream and the odd field is used for the other live
video stream.
CR9A-98 – Capture Video Start Address........................RW
23-20 Reserved .........................................always reads 0
19-0 Capture Video Start Address
Controlled by SRBE (3C5 index BE).