Product specifications

Design Guide - VT82C694X Apollo Pro133 with VT82C686A

Preliminary Revision 0.5, November 19, 1999 65 Motherboard Design Guidelines

Technologies, Inc.

We ConnectWe Connect

2.5.5 System Management Bus Interface

The I2C bus signal pair of the VT82C686A will handle all I2C buses to other on-board devices such as the Clock Synthesizer and

the three DIMM slots. A block diagram of System Management Bus Interfaces is shown in Figure 2-57. It is recommended to

place both pull-ups at the end of the I2C bus.

• Adding 68pF capacitors in Figure 2-57 for the pair at the end device is essential since the I2C bus travels a long way and

might pick up noise along the route.

VT82C686A

(South Bridge)

2.2K

ohm

2.2K

ohm

VCC3

SMBDATA

SMBCLK

The end

Device

Decoder

Encoder

DRAM

DIMMs

Clock

Synthesizer

68 pF 68 pF

Figure 2-57. System Management Bus Interface