Product specifications

Design Guide - VT82C694X Apollo Pro133 with VT82C686A
Preliminary Revision 0.5, November 19, 1999 56 Motherboard Design Guidelines
Technologies, Inc.
We ConnectWe Connect
2.4.3.5 Optimized Layout and Routing Recommendations
It is strongly recommended to maintain the trace length of all AGP (especially Data and Strobe) signals less than 4 inches. It is
always best to reduce line mismatch to add to the timing margin. In other words, a balanced topology can match trace lengths
within the groups to minimize skew. To minimize signal crosstalk, wider spacing is recommended wherever possible between
traces. A layout example of the AGP interface between the VT82C694X and the AGP Slot is shown in Figure 2-50. Optimized
layout and routing recommendations are listed below:
• Except strobe signals, traces for other AGP signals in Table 2-11 should be a minimum of 5 mils in width and 15 mils in
spacing. The trace width of these six strobe signals should be 5 mils. The spacing for each strobe signal should be a
minimum of 20 mils to other strobe signals and a minimum of 30 mils to non-strobe signals. Refer to Figure 2-51 for
more detail on layout.
• The trace width of AGP clock signals (GCLKI and GCLKO) is at least 10 mils. The spacing for any AGP clock signal
should follow the spacing requirements of its adjacent (Data, Strobe or Control) signal to limit signal coupling.
• The accumulated trace length for all signals in Table 2-11 should be less than 6 inches to limit signal coupling between
traces. Trace length mismatch in any Data/Strobe group should be maintained within 0.5 inch.
• An impedance of 65 ohm ± 5 ohm is strongly recommended for AGP 4X. Otherwise, signal integrity requirements may
be violated.
• Five extra decoupling capacitors is required for VDDQ power plane. These decoupling capacitors are mounted
right beneath the inner AGP quadrant of BGA area on the solder layer. The combination of these decoupling
capacitors is one 1uF in 1206 size, two 1uF capacitors in 0805 size, one 0.1uF capacitor in 0805 size and one 0.01uF
capacitor in 0805 size.
• AGP signals GREQ#, GGNT#, GFRAME#, GTRDY#, GIRDY#, GDEVSEL#, GSTOP#, GSERR#, GPERR#, GPAR,
GRBF#, GPIPE#, GDS[1:0], SBS and GWBF# require discrete pull-up resistors (not R-packs) to be installed on the
motherboard. These signals must be pulled up to VDDQ using 8.2K~10K ohm pull-up resistors. It is recommended to
keep the stub length as short as possible. Similarly, AGP signals GDS0#, GDS1# and SBS# require discrete 8.2K~10K
ohm pull-down resistors to be installed on the motherboard.
(a) Component Side