Product specifications

Design Guide - VT82C694X Apollo Pro133 with VT82C686A

Preliminary Revision 0.5, November 19, 1999 Signal Connectivity and Design Checklist

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5.4 Apollo Pro-133A Design Checklist

This Apollo Pro-133A (VT82C694X and VT82C686A) design checklist provides six checkup lists as a brief layout reference for

implementing most layout requirements.

5.4.1 General Layout Considerations Checklist

For most signal traces on an Apollo Pro133A motherboard layout, 5-mil trace width and 10-mil spacing are advised. To reduce

trace inductance, minimum power trace width is set at 30 mils. As a quick reference, recommended trace width and spacing for

different trace types are listed in Table 5-3.

Table 5-3. Recommended Trace Width and Spacing

Trace Type Trace Width (mils) Spacing (mils)

Signal 5 or wider 10 or wider

Clock 15 or wider 15 or wider

Power 30 or wider 20 or wider

In high-speed bus design, general rules for minimizing crosswalk are listed below:

• Maximize the distance between traces. Maintain a minimum 10 mils space between traces wherever possible.

• Avoid parallelism between traces on adjacent layers.

• Select a board stack-up that minimizes coupling between adjacent traces.

• The recommended impedance should be in the range of 65 ohm +/- 5 ohm.

5.4.2 Major Components Checklist

Major components for the Apollo Pro-133A based system are listed below:

• Processor selection: Single Slot-1 CPU or Single Socket-370 CPU

• Apollo Pro-133 A chipset combination: VT82C694X and VT82C686A

• Apollo Pro-133A dedicate system clock synthesizers: ICS9248-39, PLL52C66-23 or IC Works W144

• Maximum DRAM DIMM slots: 4 (Maximum 8 banks up to 2GB DRAM)

• Maximum AGP slot: 1 only

• Maximum PCI slots: 5