Product specifications

VT8237R Data Sheet
Revision 2.06 December 15, 2004 -59- Device 15 Function 0 Serial ATA Controller Registers
SATA PHY Control Registers
Offset 5A – Internal SATA PHY Control (10h) .............RW
7 Reserved ......................................................... def = 0
6 Bypass Oscillator ........................................... def = 0
5 OSC Latch up Test Control .......................... def = 0
4 OOB Signal Select
0 AFE
1 Digital ...................................................default
3 Reserved ......................................................... def = 0
2 TxReady Timer Speed up (simulation only) def = 0
1 Bailout Mode Test Enable............................. def = 0
0 Force PHY Ready (simulation only) ............ def = 0
Offset 5B – External SATA PHY Control (00h).............RW
7-3 Reserved ............................................. always reads 0
2 TxReady Timer Speed up (simulation only) def = 0
1 Bailout Mode Test Enable............................. def = 0
0 Force PHY Ready (simulation only) ............ def = 0
Offset 5C – Internal SATA PHY Control (05h) .............RW
7-6 Reserved ................................................... default = 0
5 CDR Bandwidth Select Bit1.................... default = 0
4 CDR Bandwidth Select Bit0.................... default = 0
3 OOB2 Current Control Bit 1 .................. default = 0
2 OOB2 Current Control Bit 0 ................. default = 1
1 OOB1 Current Control Bit 1 .................. default = 0
0 OOB1 Current Control Bit 0 ................. default = 1
Offset 5D – SATA PHY Direct Access Mode Ctrl (00h) RW
7 Enable SATA PLL Testing Mode........... default = 0
6-5 Reserved ............................................always reads 0
4 Enable Test Pin Data Output.................. default = 0
3 Select External PHY Signals................... default = 0
2 Select Secondary Port Signals................. default = 0
1 Select 10B Receive Signals ...................... default = 0
0 Select 8B Transmit Signals...................... default = 0
Offset 5E – SATA Internal PHY Pad Control (00h) ......RW
7 VCOMP Internal Latch Ctrl Status....... default = 0
6-4 VCOMP Output Status ........................... default = 0
Valid only when Bit 3 = 0
3 Adjust VCOMP Manually ...................... default = 0
2-0 VCOMP Control
Transport Status Registers
Offset 78 – Primary Channel Transport Stats (01h) ...... RO
7-5 Reserved..............................................always reads 0
4 Primary Channel DMA Read Device Cycle Active
............................................................... def = 0
3 Primary Channel DMA Write Device Cycle Active
............................................................... def = 0
2 Primary Channel SG Operation Active .......def = 0
1 Primary Channel Interrupt Status ............... def = 0
0 Primary Channel FIFO Empty Status .........def = 1
Offset 79 – Primary Channel Transport Status (00h) .... RO
7-5 Reserved..............................................always reads 0
4 Primary Channel Slave Drive Select ............def = 0
3 Transmit PIO Data Cycle Active .................. def = 0
2 Transmit PIO Data Cycle Receive................def = 0
1 Transmit DMA Data Cycle Active................def = 0
0 Transmit DMA Data Cycle Receive.............. def = 0
Offset 7A – Secondary Channel Transport Stats I (01h) RO
7-5 Reserved..............................................always reads 0
4 Secondary Channel DMA Read Device Cycle
Active...............................................................def = 0
3 Secondary Channel DMA Write Device Cycle
Active...............................................................def = 0
2 Secondary Channel SG Operation Active....def = 0
1 Secondary Channel Interrupt Status............ def = 0
0 Secondary Channel FIFO Empty Status......def = 1
Offset 7B – Secondary Channel Transport Status II...... RO
7-5 Reserved............................................ always reads 0
4 Primary Channel Slave Drive Select ............def = 0
3 Transmit PIO Data Cycle Active .................. def = 0
2 Transmit PIO Data Cycle Receive................def = 0
1 Transmit DMA Data Cycle Active................def = 0
0 Transmit DMA Data Cycle Receive.............. def = 0