Product specifications

VT8237R Data Sheet
Revision 2.06 December 15, 2004 -53- Device 15 Function 0 Serial ATA Controller Registers
Device 15 Function 0 Registers – Serial ATAController
This Serial ATA controller interface is fully compatible with
the SATA v.1.0 specification. There are two sets of software
accessible registers -- PCI configuration registers and I/O
registers. The PCI configuration registers are located in the
device 15 function 0 PCI configuration space of the VT8237R.
The base address of the I/O registers is specified in PCI
Configuration register offset 27-24.
PCI Configuration Space Header
Offset 1-0 - Vendor ID (1106h=VIA)................................RO
Offset 3-2 - Device ID (3149h=SATA Controller) ...........RO
Offset 5-4 – Command (0000h) ........................................RW
15-10 Reserved ............................................. always reads 0
9 Fast Back-to-Back Cycles.............................. def = 0
8 Reserved ............................................. always reads 0
7 Address Stepping ........................................... def = 0
6 Parity Error Response................................... def = 0
5 Reserved ............................................. always reads 0
4 Memory-Write-and-Invalidate ..................fixed at 0
3 Respond to Special Cycles..........................fixed at 0
2 Bus Master...................................................... def = 0
1 Memory Space Access ................................... def = 0
0 I/O Space Access ............................................ def = 0
When the “I/O Space” bit is disabled, the device will
not respond to I/O addresses.
Offset 7-6 – Status (0290h)) ...............................................RO
15 Detected Parity Error.................................fixed at 0
14 Signalled System Error ..............................fixed at 0
13 Received Master Abort............................ default = 0
12 Received Target Abort ............................ default = 0
11 Signalled Target Abort...............................fixed at 0
10-9 DEVSEL# Timing.......... always reads 01 (medium)
8 Data Parity Detected...................................fixed at 0
7 Fast Back to Back Caability.......................fixed at 1
6-5 Reserved ........................................ always reads 0
4 Power Management Capability List..........fixed at 1
3-0 Reserved ........................................ always reads 0
Offset 8 - Revision ID (80) .................................................RO
7-0 Revision Code for SATA Controller Logic Block
Offset 9 - Programming Interface (8Fh)......................... RW
7 Master Capability................... fixed at 1 (Supported)
6-4 Reserved ........................................always reads 0
3 Programmable Indicator - Secondary...... fixed at 1
Supports both modes (may be set to either mode by
writing Rx42[6])
2 Channel Operating Mode - Secondary
0 Compatibility Mode
1 Native Mode......................................... default
1 Programmable Indicator - Primary ......... fixed at 1
Supports both modes (may be set to either mode by
writing Rx42[7])
0 Channel Operating Mode - Primary
0 Compatibility Mode
1 Native Mode......................................... default
Compatibility Mode (fixed IRQs and I/O addresses):
Command Block Control Block
Channel
Registers Registers IRQ
Pri 1F0-1F7 3F6 14
Sec 170-177 376 15
Native PCI Mode (registers are programmable in I/O space)
Command Block Control Block
Channel
Registers Registers
Pri BA @offset 10h BA @offset 14h
Sec BA @offset 18h BA @offset 1Ch
Command register blocks are 8 bytes of I/O space
Control registers are 4 bytes of I/O space (only byte 2 is used)
Offset A - Sub Class Code (04h=RAID Controller)........ RO
Offset B - Base Class Code (01h=Mass Storage Ctrlr)... RO
Offset D – Latency Timer (20h)....................................... RW
Offset E – Header Type (80h)........................................... RO
7 Multiple Function Device................. always reads 1
6-0 Reserved ........................................always reads 0