Product specifications

VT8237R Data Sheet
Revision 2.06 December 15, 2004 -13- Pin Descriptions
MII, Serial EEPROM and Low Pin Count Pin Descriptions
LAN Controller - Media Independent Interface (MII)
Signal Name Pin # I/O PU Signal Description
MCOL
B11 I
PD
MII Collision Detect. From the external PHY.
MCRS
A11 I
PD
MII Carrier Sense. Asserted by the external PHY when the media is
active.
MDCK
A7 O
PD
MII Management Data Clock. Sent to the external PHY as a timing
reference for MDIO
MDIO
B7 IO
PD
MII Management Data I/O. Read from the MDI bit or written to the
MDO bit.
MRXCLK
C9 I
PD
MII Receive Clock. 2.5 or 25 MHz clock recovered by the PHY.
MRXD[3-0]
C7, A8, B8, C8 I
PD
MII Receive Data. Parallel receive data lines driven by the external
PHY synchronous with MRXCLK.
MRXDV
D8 I
PD MII Receive Data Valid.
MRXERR
D10 I
PD
MII Receive Error. Asserted by the PHY when it detects a data
decoding error.
MTXCLK
C10 I
PD
MII Transmit Clock. Always active 2.5 or 25 MHz clock supplied by
the PHY.
MTXD[3-0]
A9, B9, B10, A10 O
PD
MII Transmit Data. Parallel transmit data lines synchronized to
MTXCLK.
MTXENA
C11 O
PD
MII Transmit Enable. Signals that transmit is active from the MII
port to the PHY.
PHYRST#
D7 O
External PHY Reset.
MIIVCC
D9, E9 - 11
Power
LAN MII Power. 3.3V ±5% Suspend Power for LAN Media
Independent Interface (interface to external PHY).
MIIVCC25
D12, E12
Power
MII Suspend Power. 2.5V ±5%.
LANVCC
E7
Power
Power For LAN. 2.5V ±5%.
LANGND
E6
Power Ground For LAN.
Serial EEPROM Interface
Signal Name Pin # I/O PU Signal Description
EECS#
D11 O -
Serial EEPROM Chip Select.
EECK
C12 O -
Serial EEPROM Clock.
EEDO
B12 I - Serial EEPROM Data Output. Connect to EEPROM Data Out pin.
EEDI / strap A12 O - Serial EEPROM Data Input. Connect to EEPROM Data In pin.
The serial EEPROM Interface signals are disabled if the EEDI pin is strapped high.
Low Pin Count (LPC) Interface
Signal Name Pin # I/O PU Signal Description
LAD[3-0]
AD7, AE7, AF7, AD8 IO PU
LPC Address / Data.
LFRM#
AF6 O -
LPC Frame.
LREQ0#
AE6 I -
LPC DMA / Bus Master Request 0.
LREQ1#
AE8 I -
LPC DMA / Bus Master Request 1.
Note: Connect the LPC interface LPCRST# (LPC Reset) signal to PCIRST#