Product specifications

VT8237R Data Sheet
Revision 2.06 December 15, 2004 -119- Device 17 Function 0 Power Management Registers
Watchdog Timer Registers
Offset EB-E8 – Watchdog Timer Memory Base ............RW
31-8 Watchdog Timer Memory Base [31:8]
7-0 Reserved ........................................ always reads 0
Offset EC – Watchdog Timer Control (00h)...................RW
7-3 Reserved ........................................ always reads 0
2 C3 VID / FID Latency Reduce to 5us
1 Watchdog Timer
0 Disable ...................................................default
1 Enable (after being set to 1, this bit can only
be set to 0 by PCI reset)
0 Watchdog Timer Memory
0 Disable ...................................................default
1 Enable