Product specifications

VT8237R Data Sheet
Revision 2.06 December 15, 2004 -118- Device 17 Function 0 Power Management Registers
General Purpose I/O Control Registers
Offset E0 – GPI Inversion Control ..................................RW
7-4 GPI[27-24] Input Inversion
0 Non-inverted ..........................................default
1 Inverted
3-0 GPI[19-16] Input Inversion
0 Non-inverted ..........................................default
1 Inverted
Offset E1 – GPI SCI / SMI Select ....................................RW
7-4 GPI[27-24] SCI / SMI Select
When GPI[27-24, 19-16] are set to enable SCI / SMI
generation (PMIO Rx52), this field determines
whether an SCI or SMI is generated.
0 SCI .....................................................default
1 SMI
3-0 GPI[19-16] SCI / SMI Select
0 SCI .....................................................default
1 SMI
Offset E4 – GPO Pin Select ..............................................RW
7 Reserved ........................................ always reads 0
6 ACSDIN2,3 / GPIO20,21 Select (Pins U1, V3)
This bit is ignored if any of RxE5 bits 1, 2, 4, or 5 = 1
0 U1 = ACSDIN2, V3 = ACSDIN3..........default
1 U1 = GPIO20, V3 = GPIO21
5 UDPWRxx / GPIO9 Select (Pins D25, D26)
0 D25 = UDPWREN#, D26 = UDPWR ..default
1 D25 = GPO9, D26 = GPI9
4 GPIO[15:12] Direction (Pins B3, A3, E4, D4)
0 Input (pins are GPI[15:12] / INT[H:E]) .default
1 Output (pins are GPO[15:12])
(see also Rx5B[1] for GPO/Int select)
3 GPIO8 Pin Direction (Pin AC9)
0 Input (AC9=GPI8 / VGATE).................default
(see RxE5[4] for GPI8 / VGATE select)
1 Output (AC9=GPO8)
2 GNT5# / GPO7 Select (Pin R2)
REQ5# / GPI7 Select (Pin R3)
0 R2 = GPO7, R3 = GPI7 .........................default
1 R2 = GNT5#, R3 = REQ5#
1 PCISTP# / GPO6 Select (Pin AF6)
0 AF6 = PCISTP# .....................................default
1 AF6 = GPO6
0 CPUSTP# / GPO5 Select (Pin AC7)
0 AC7 = CPUSTP# ...................................default
1 AC7 = GPO5
Offset E5 – GPIO I/O Select 1 ......................................... RW
7 Voltage Regulator Change Timer Select
0 100 usec................................................. default
1 200 usec
6 AGPBZ# Source of Bus Master Status
0 Disable................................................... default
1 Enable
5 External APIC Wakeup from INTH#
0 Disable................................................... default
1 Enable
4 VGATE on GPIO8 (Pin AC9)
0 AC9 = GPIO8........................................ default
1 AC9 = VGATE (bit 1 & RxE4[6] are ignored)
3 CPU Frequency Change ..........................default = 0
AC8
R22 AB9 P21
0 Enable VIDSEL GHI# VRDSLP DPSLP#
1 Disable GPIO28 GPIO22 GPIO29 GPIO23
2 PCS1# on ACSDIN3 (Pin V3)
0 V3 = ACSDIN3 / GPIO21 / SLPBTN#. default
1 V3 = PCS1# (RxE4[6] ignored)
1 PCS0# on ACSDIN2 (Pin U1)
0 U1 = ACSDIN2 / GPIO20..................... default
1 U1 = PCS0# (RxE4[6] ignored)
0 SATALED# Function on GPIO28 (Pin AC8)
0 Disable................................................... default
1 Enable
Offset E6 – GPIO I/O Select 2 ......................................... RW
7 GPI31 / GPO31 (GPIOD) Select (Pin AC6)
0 AC6 = GPI31......................................... default
1 AC6 = GPO31 / GPIOD
6 GPI30 / GPO30 (GPIOC) Select (Pin AF5)
0 AF5 = GPI30 ......................................... default
1 AF5 = GPO30 / GPIOC
5-2 Reserved ........................................always reads 0
1 GPI25 / GPO25 (GPIOB) Select (Pin AD5)
0 AD5 = GPI25......................................... default
1 AD5 = GPO25 / GPIOB
0 GPI24 / GPO24 (GPIOA) Select (Pin AE5)
0 AE5 = GPI24......................................... default
1 AE5 = GPO24 / GPIOA