Setup guide

32
Using BIOS
AGP & P2P Bridge Control (Press Enter)f
Scroll to this item and press <Enter> to view the following screen:
Item Help
Menu Level
f
f
Phoenix-AwardBIOS CMOS Setup Utility
AGP & P2P Bridge Control
AGP Aperture Size [128M]
AGP Mode [4X]
AGP Driving Control [Auto]
AGP Driving Value DA
AGP Fast Write [Disabled]
AGP Master 1 WS Write [Disabled]
AGP Master 1 WS Read [Disabled]
AGP 3.0 Calibration Cycle [Enabled]
VGA Share Memory Size [32M]
X
: Move Enter: Select +/-/PU/PD:Value F10:Save ESC:Exit F1: General Help
mnlk
F5:Previous Values F6:Fail-Safe Defaults F7:Optimized Defaults
AGP Aperture Size(128M)
This setting controls just how much system RAM can be allocated to AGP for video
purposes. The aperture is a portion of the PCI memory address range dedicated to graphics
memory address space. Host cycles that hit the aperture range are forwarded to the AGP
without any translation.
AGP Mode (4X)
Set this option to enable if you want the AGP bus to make use of the AGP 4X transfer
protocol to boost the AGP bus bandwidth. If it is set to disabled, then the AGP bus is only
allowed to use the AGP 1X or AGP 2X transfer protocol.
AGP Driving Control (Auto)
This item is used to signal driving current on AGP cards to auto or manual. Some AGP cards
need stronger than normal driving current in order to operate. We recommend that you set
this item to the default.
• AGP Driving Value: When AGP Driving Control is set to Manual, use this item
to set the AGP current driving value.
AGP Fast Write (Disabled)
This item lets you enable or disable the caching of display data for the video memory of the
processor. Enabling this item can greatly improve the display speed. Disable this item if
your graphics display card does not support this feature.
AGP Master 1 WS Write (Disabled)
This implements a single delay when writing to the AGP Bus. By default, two-wait states are
used by the system, providing greater stability.
AGP Master 1 WS Read (Disabled)
This implements a single delay when reading to the AGP Bus. By default, two-wait states are
used by the system, allowing for greater stability
AGP 3.0 Calibration Cycle (Enabled)
This item is used to implement dynamic compensation to recalibrate the AGP bus over time
for AGP 3.0 compatible chipset.