Product specifications

VT1211 LPC SuperIO and Hardware Monitor
Revision 1.0 January 8, 2002 -41- Register Descriptions – Wake Up Control I/O
Technologies, Inc.
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Offset 1C – Event Configuration.....................................RW
7 GPIO Event Source Select
0 Select GPIO2x as event input source.....default
1 Select GPIO7x as event input source
6 Reserved ........................................ always reads 0
5 SMI# Output Select
0 Wake-up events that are enabled active the
SMI# signal control by SMIENx register and
regardless of the WUENx register .........default
1 Wake-Up events status bits (see Rx01) that are
enabled activate the SMI# signal on pin 98
4-3 Reserved ........................................ always reads 0
2-0 Power LED Output Control
There are some types that are enabled activate on the
PLED signal of pin 102.
000 Control by Wakeup Config Rx6[4]........default
001 LED with 1/4 Hz toggle rate
010 LED with 1/2 Hz toggle rate
011 LED with 1 Hz toggle rate
100 LED with 2 Hz toggle rate
101 LED with 4 Hz toggle rate
110 LED off
111 LED constant on
Offset 1D – Event Debounce Enable ..............................RW
7-0 Event Debounce Enable
This register enables the debounce of inputs of GPIO
of either GP2x or GP7x as event inputs, according to
Wake-up Configuration Register Rx1C[7].
0 Disable ...................................................default
1 Enable
Offset 1E – Event Polarity................................................RW
7-0 Event Polarity Type
This register selects the polarity of inputs of GPIO of
either GP2x or GP7x as event inputs, according to
Wake-up Configuration Register Rx1C[7].
0 Not Inverted ...........................................default
1 Inverted
Offset 1F – Event Trigger Type......................................RW
7-0 Event Trigger Type
This register selects edge or level type of input for
GPIO event inputs of either GP2x or GP7x,
according to Wake-up Configuration Register
Rx1C[7].
0 Edge .....................................................default
1 Level
Offset 20 – GP2x Output Enable .................................... RW
7-0 GP2x Output Enable
This register enables polarity inversion on the input
pins of GP2x.
0 GPI .................................................... default
1GPO
Offset 21 – GP2x Polarity Inversion............................... RW
7-0 GP2x Polarity Inversion
This register enables polarity inversion on the input
pins of GP2x.
0 Disable................................................... default
1 Enable
Offset 22 – GP7x Output Enable .................................... RW
7-0 GP7x Output Enable
This register selects GPI or GPO functions for GP7x.
0 GPI .................................................... default
1GPO
Offset 23 – GP2x Polarity Inversion............................... RW
7-0 GP2x Polarity Inversion
This register enables polarity inversion on the input
pins of GP7x.
0 Disable................................................... default
1 Enable