Product specifications

VT1211 LPC SuperIO and Hardware Monitor
Revision 1.0 January 8, 2002 -40- Register Descriptions – Wake Up Control I/O
Technologies, Inc.
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Offset 0E – SMI# Event Enable 0....................................RW
7 Module IRQ
0 Disable ...................................................default
1 Enable
6 Software Enable
0 Disable ...................................................default
1 Enable
5-3 Reserved ........................................ always reads 0
2 RI2# Enable
0 Disable ...................................................default
1 Enable
1 RI1# Enable
0 Disable ...................................................default
1 Enable
0 Reserved ........................................ always reads 0
Offset 0F – SMI# Event Enable 1 ....................................RW
7-0 GPx [7:0] Enable
This register enables the GPIO of either GP2x or
GP7x event detection, according to Wake-up
Configuration Register Rx1C[7].
0 Disable ...................................................default
1 Enable
Offset 11 –IRQ Event Enable 0 ....................................... RW
7 Module IRQ
0 Disable................................................... default
1 Enable
6 Software Enable
0 Disable................................................... default
1 Enable
5-3 Reserved ........................................always reads 0
2 RI2# Enable
0 Disable................................................... default
1 Enable
1 RI1# Enable
0 Disable................................................... default
1 Enable
0 Reserved ........................................always reads 0
Offset 12 – IRQ Event Enable 1 ..................................... RW
7-0 GPx [7:0] Enable (GPIEN [7:0])
This register enable the GPIO of either GP2x or
GP7x event detection, according to Wake-up
Configuration Register Rx1C[7].
0 Disable................................................... default
1 Enable