Product specifications

VT1211 LPC SuperIO and Hardware Monitor
Revision 1.0 January 8, 2002 -36- Register Descriptions – GPIO I/O
Technologies, Inc.
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Offset 05 – GPIO Events Status A................................RWC
7-0 GPx [7:0] Event Status A
This register shows event detection status of either
GP1X or GP3X, according to Global Register
Rx28[6]. These bits are only set by hardware and
can only be reset by writing a 1 to relative bit
position.
0 Event undetected....................................default
1 Event detected
Offset 06 – GPIO Events Enable A .................................RW
7-0 GPx [7:0] Enable
This register enables event detection for the GPIO
pins of either GP2X or GP7x, according to Global
Register Rx28[6].
0 Disable ...................................................default
1 Enable
Offset 07 – GPIO Events Status B................................ RWC
7-0 GPx [7:0] Event Status B
This register shows the event detection status of
either GP4X or GP5X, according to Global Register
28[7]. These bits are only set by hardware and can
only be reset by writing a 1 to relative bit position.
0 Event undetected....................................default
1 Event detected
Offset 08 – GPIO Events Enable B..................................RW
7-0 GPx [7:0] Enable
This register enables event detection on the GPIO
pins of either GP2X or GP7x, according to Global
Register Rx28[7].
0 Disable ...................................................default
1 Enable
Offset 09 – GPIO Events Debounce Enable A ............... RW
7-0 Event Debounce Enable A
This register enables the debounce of GPIO event
inputs of either GP1x or GP3x, according to Global
Register Rx28[6].
0 Disable................................................... default
1 Enable
Offset 0A – GPIO Events Polarity Type A..................... RW
7-0 Event Polarity Type A
This register selects the polarity of GPIO event
inputs of either GP1x or GP3x, according to Global
Register Rx28[6].
0 Not Inverted .......................................... default
1 Inverted
Offset 0B – GPIO Events Trigger Type A...................... RW
7-0 Event Trigger Type A
This register selects edge or level type of GPIO event
inputs of either GP1x or GP3x, according to register
bit of Global Register Rx28[6].
0 Edge....................................................... default
1 Level
Offset 0C – GPIO Events Debounce Enable B .............. RW
7-0 Event Debounce Enable B
This register enables the debounce of GPIO event
inputs of either GP4x or GP5x, according to Global
Register Rx28[7].
0 Disable................................................... default
1 Enable
Offset 0D – GPIO Events Polarity Type B..................... RW
7-0 Event Polarity Type
This register selects the polarity of GPIO event
inputs of either GP4x or GP5x, according to Global
Register Rx28[7].
0 Not Inverted .......................................... default
1 Inverted
Offset 0E – GPIO Events Trigger Type B...................... RW
7-0 Event Trigger Type B
This register selects edge or level type of GPIO event
inputs of GPIO of either GP4x or GP5x, according to
Global Register Rx28 [7].
0 Edge .................................................... default
1 Level