Product specifications

VT1211 LPC SuperIO and Hardware Monitor
Revision 1.0 January 8, 2002 -26- Register Descriptions – LDN 6-8 MIDI, Game, GPIO
Technologies, Inc.
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MIDI Registers (LDN 6)
Offset 30 – MIDI Activate (00h) ......................................RW
7-1 Reserved ........................................ always reads 0
0 MIDI Function
0 Disable ...................................................default
1 Enable
Offset 61-60 – MIDI Base Address (0330h) ....................RW
15-2 MIDI I/O Base Register ...…………default = 0330h
1-0 Reserved ........................................ always reads 0
Offset 70 – MIDI IRQ Select (00h)..................................RW
7-4 Reserved ........................................ always reads 0
3-0 MIDI IRQ Select...................................... default = 0
Game Port Registers (LDN 7)
Offset 30 – Game Port Activate .......................................RW
7-1 Reserved ........................................ always reads 0
0 Game Port Enable ................................... default = 0
Offset 61-60 – Game Port I/O Base Address (0200h) ....RW
15-3 Game Port I/O Base...………...……..default = 020h
2-0 Reserved .................................. always reads 000b
GPIO Registers (LDN 8)
Offset 30 – GPIO Activate (00h) ..................................... RW
7-1 Reserved ........................................always reads 0
0 GPIO Function
0 Disable................................................... default
1 Enable
Offset 61-60 – GPIO Base Address (E900h) .................. RW
15-4 GPIO I/O Base....................................default = E90h
3-0 Reserved ........................................always reads 0
Offset 70 – GPIO Event IRQ Select................................ RW
7-4 Reserved ........................................always reads 0
3-0 GPIO Event IRQ Select............................. default=0
Offset F0 – GPIO Port Select .......................................... RW
7-3 Reserved ........................................always reads 0
2-0 GPIO Port Configuration Register Bank Select
.............................................. default = 0
Offset F1 – GPIO Pin Configuration .............................. RW
7-0 GPIO Pin Direction
0 Output.................................................... default
1 Input
Offset F0 – GPIO Pin Polarity ........................................ RW
7-0 GPIO Pin Polarity
0 Normal................................................... default
1 Inverted