Product specifications

VT1211 LPC SuperIO and Hardware Monitor
Revision 1.0 January 8, 2002 -13- Pinouts
Technologies, Inc.
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Flash ROM Interface
Signal Name Pin # Type Description
XA[18-16] / GP[62-60],
XA[15-8] / GP[57-50],
XA[7-0] / GP[47-40]
66-68,
69-74,
76-77,
78-85
O
ROM Address[18:0]. The default function of these pins is for flash ROM
address input. The function of these pins decided by the GPIO configuration
register.
XD7-XD0 / GP[37-30]
86-89,
91-94
IO
ROM Data[7:0]. The default function of these pins is for flash ROM data
input. The function configuration of these pins decided by the GPIO
configuration register.
ROMCS# /GP27
95 O
ROM Chip Select. The default function of this pin is for ROM chip select
input. The function of this pin decided by the GPIO configuration register.
MEMR# /GP26
96 O
Memory Read. The default function of this pin is memory read enable. The
function of this pin decided by the GPIO configuration register.
MEMW# /GP25
97 O
Memory Write. The default function of this pin is for a memory write
enable. The function of this pin decided by the GPIO configuration register.
Miscellaneous
Signal Name Pin # Type Description
PLED
/ OVOLT
/ITMOFF
/GP22
102 IO
Power Indicator. The default function of this pin is an indicator of power on
after system reset. The function of this pin determined by the GPIO
configuration register.
SMI#
98 O
System Management Interrupt.
CLKIN
17 I
48 MHz Clock.
Strap Configuration
Signal Name Pin # Type Description
BADDR
49 I
Base Address. Sampled at reset to determine the base address of the
configuration index / data register pair, as follows:
10K external pull-up resistor selects 2Eh / 2Fh.
10K external pull-down resistor selects 4Eh / 4Fh.
TEST
50 I
Test. Force the device into test mode if an external pull-up resistor is
connected. Otherwise, this pin should be pulled-down by an external resistor
for normal operation.
ENFROM
52 I
Enable Flash ROM. Enabled Flash-ROM Interface if an external pull-up
resistor is connected. Otherwise, the Flash ROM pins function as GPIO ports
(from pin 66 to pin 97).
Power Supplies
Signal Name Pin # Type Description
VCC
5, 22, 45, 75 Power
Digital Power. 3.3V
VCCA
105 Power
Analog Power.
GNDD
18, 60, 90, 99 Ground
Digital Ground.
GNDA
112 Ground
Analog Ground.
Note 1: A combination of high frequency decoupling capacitors is suggested on all analog power / ground pairs.
Note 2. All grounds should be connected to the primary circuit board ground plane (i.e., to the lowest impedance point available).