Product specifications

VT8235 V-Link South Bridge
Revision 1.22 October 24, 2002 -51- Device 16 Function 1 USB UHCI Registers for Ports 2-3
USB-Specific Configuration Registers
Offset 40 - Miscellaneous Control 1 (40h).......................RW
7 Reserved ........................................ always reads 0
6 Babble Option
This bit controls whether the port is disabled when
EOF (End-Of-Frame) babble occurs. Babble is
unexpected bus activity that persists into the EOF
interval. When this bit is 0, the port with the EOF
babble is disabled. When it is 1, it is not disabled
0 Automatically disable babbled port when EOF
babble occurs
1 Don’t disable babbled port....................default
5 PCI Parity Check
0 Disable .................................................. default
1 Enable
4 Frame Interval Select
0 1 msec frame time ................................. default
1 0.1 msec frame time
3 USB Data Length Option
0 Support TD length up to 1280............... default
1 Support TD length up to 1023
(TD = Transfer Descriptor)
2 Improve FIFO Latency
0 Improve latency if packet size < 64 bytes ... def
1 Disable improvement
1 DMA Option
0 Enhanced performance (8 DW burst access
with better FIFO latency) ...................... default
1 Normal performance (16 DW burst access
with normal FIFO latency)
0 Reserved ........................................ always reads 0
Offset 41 - Miscellaneous Control 2 (10h)....................... RW
7 USB 1.1 Improvement for EOP
This bit controls whether USB Specification 1.1 or
1.0 is followed when a stuffing error occurs before an
EOP (End-Of-Packet). A stuffing error results when
the receiver sees seven consecutive ones in a packet.
Under USB specification 1.1, when this occurs in the
interval just before an EOP, the receiver will accept
the packet. Under USB specification 1.0, the packet
is ignored.
0 USB Spec 1.1 Compliant (packet accepted) def
1 USB Spec 1.0 Compliant (packet ignored)
6-3 Reserved (Do Not Program) ....................default = 0
2 Trap Option
Under the UHCI spec, port 60 / 64 is trapped only
when its corresponding enable bits are set. When this
bit is set, trap can be set without checking the enable
bits.
0 Set trap 60/64 status bits only when trap 60/64
enable bits are set...................................default
1 Set trap 60/64 status bits without checking
enable bits
1 A20Gate Pass Through Option
This bit controls whether the A20Gate pass-through
sequence (as defined in UHCI) is followed. The
A20Gate sequence consists of 4 commands. When
this bit is 0, the 4-command sequence is followed.
When this bit is 1, the last command (write FFh to
port 64) is skipped.
0 A20GATE Pass-through command sequence
as defined in UHCI ................................ default
1 Last command skipped
0 Reserved (Do Not Program) ....................default = 0