Product specifications

VT8235 V-Link South Bridge
Revision 1.22 October 24, 2002 -14- Pin Descriptions
UltraDMA-133 / 100 / 66 / 33 Enhanced IDE Interface
Signal Name Pin # I/O Signal Description
PDRDY /
PDDMARDY /
PDSTROBE
Y26 I EIDE Mode: Primary I/O Channel Ready. Device ready indicator
UltraDMA Mode: Primary Device DMA Ready. Output flow control. The device may
assert DDMARDY to pause output transfers
Primary Device Strobe. Input data strobe (both edges). The device
may stop DSTROBE to pause input data transfers
SDRDY /
SDDMARDY /
SDSTROBE
AD15 I EIDE Mode: Secondary I/O Channel Ready. Device ready indicator
UltraDMA Mode: Secondary Device DMA Ready. O
utput flow control. The device
may assert DDMARDY to pause output transfers
Secondary Device Strobe. Input data strobe (both edges). The device
may stop DSTROBE to pause input data transfers
PDIOR# /
PHDMARDY /
PHSTROBE
Y24 O EIDE Mode: Primary Device I/O Read.
Device read strobe
UltraDMA Mode: Primary Host DMA Ready. Primary
channel input flow control. The
host may assert HDMARDY to pause input transfers
Primary Host Strobe. Output data strobe (both edges). The host may
stop HSTROBE to pause output data transfers
SDIOR# /
SHDMARDY /
SHSTROBE
AF22 O EIDE Mode: Secondary Device I/O Read. Device read strobe
UltraDMA Mode: Secondary Host DMA Ready. Input flow control. The host may
assert HDMARDY to pause input transfers
Host Strobe B. Output strobe (both edges). The host may stop
HSTROBE to pause output data transfers
PDIOW# /
PSTOP
Y25 O EIDE Mode: Primary Device I/O Write. Device write strobe
UltraDMA Mode: Primary Stop. Stop transfer: Asserted by the host prior to initiation of
an UltraDMA burst; negated by the host before data is transferred in
an UltraDMA burst. Assertion of STOP by the host during or after data
transfer in UltraDMA mode signals the termination of the burst.
SDIOW# /
SSTOP
AC21 O EIDE Mode: Secondary Device I/O Write. Device write strobe
UltraDMA Mode: Secondary Stop. Stop transfer: Asserted by the host prior to initiation
of an UltraDMA burst; negated by the host before data is transferred in
an UltraDMA burst. Assertion of STOP by the host during or after data
transfer in UltraDMA mode signals the termination of the burst.
PDDRQ
Y22 I Primary Device DMA Request. Primary
channel DMA request
SDDRQ
AE15 I Secondary Device DMA Request. Secondary
channel DMA request
PDDACK#
W26 O Primary Device DMA Acknowledge. Primary
channel DMA acknowledge
SDDACK#
AD22 O Secondary Device DMA Acknowledge. Secondary
channel DMA acknowledge
IRQ14
AE24 I
Primary Channel Interrupt Request.
IRQ15
AF24 I
Secondary Channel Interrupt Request.