Product specifications

VT8235 V-Link South Bridge
Revision 1.22 October 24, 2002 -102- Device 17 Function 5 Audio Controller Registers
Offset 42 – Function Enable.............................................RW
7-6 Reserved ........................................ always reads 0
5 Function 5 Config Reg Rx2C Writable.............RW
0 Device 17 Function 5 Rx2C-2F RO ...... default
1 Device 17 Function 5 Rx2C-2F RW
4-0 Reserved ........................................ always reads 0
Offset 44 – MC97 Interface Control................................ RO
Mapped RO to function 5 (RW in func 6) for status reporting.
7 AC-Link Interface for Slot-5 (Modem)............. RO
0 Disable .................................................. default
1 Enable
6 Secondary Codec Support.................................. RO
0 Disable .................................................. default
1 Enable
5 Function 6 Config Reg Rx9-B Writable............ RO
0 Device 17 Function 6 Rx9-B RO .......... default
1 Device 17 Function 6 Rx9-B RW
4 Function 6 Config Reg 2Ch Writable................ RO
0 Device 17 Function 6 Rx2C-2F RO ...... default
1 Device 17 Function 6 Rx2C-2F RW
3 Sync ......................................................... RO
This bit reports whether there is activity in function 6
(modem). When function 5 (audio) enters low-power
state and wants to gate bit-clock, software needs to
check this bit to see whether bit-clock can actually be
gated, as function 6 shares the same bit-clock.
0 Function 6 activity in progress that requires
bit-clock
1 Function 6 does not need bit-clock so bit-clock
can be gated
2-0 Reserved ........................................ always reads 0
Offset 48 – Volume Change Rate Control ...................... RW
7-4 Volume Change Rate
This field controls the volume change rate in the
sample rate converter
0000 Volume Adjust Every Frame (sync cycle)...def
…
1111 Volume Adjust Every 16 Frames (sync cycles)
3 Sync
This bit reports whether there is activity in function 5
(audio). When function 6 (modem) enters low-power
state and wants to gate bit-clock, software needs to
check this bit to see whether bit-clock can actually be
gated, as function 5 shares the same bit-clock.
0 Function 5 activity in progress that requires
bit-clock
1 Function 5 does not need bit-clock so bit-clock
can be gated
2-0 Reserved ........................................................ RW
Offset 49 – S/PDIF Control..............................................RW
7-4 Reserved ........................................always reads 0
3 DX3 (DirectSound) Channel S/PDIF Support
This bit controls whether DirectSound Channel 3 is
used as S/PDIF support
0 Disable...................................................default
1 Enable
2 Reserved ........................................always reads 0
1-0 S/PDIF Data Slot Select
00 Slot 10/11...............................................default
01 Slot 3/4
10 Slot 7/8
11 Slot 6/9
Offset C3-C0 – Power Mgmt Capability..........................RO
31-0 Power Mgmt Capability....always reads 0002 0001h
Offset C7-C4 – Power State ............................................. RW
31-2 Reserved ........................................always reads 0
1-0 Power State (D3 / D0 Only)