Product specifications
CN333 Data Sheet
Revision 1.0, January 5, 2005 -62- Device 0 Function 7 Register Descriptions – V-Link
Offset 4A – SB Downlink Status (88h) .............................RO
7-4 DnCmd Max Request Depth (0=1 DnCmd).. def = 8
3-0 DnCmd Write Buffer Size (doublewords)..... def = 8
Offset 4B – SB Uplink Command (80h) ..........................RW
7-4 UpCmd Max Request Depth (0=1 UpCmd).. def = 8
Indicates the maximum allowable number of
outstanding UPCMD requests
3-0 Reserved ........................................ always reads 0
Offset 4C – SB Uplink Command (82h) ..........................RW
7-4 UpCmd P2C Write Buffer Size (max lines).. def = 8
3-0 UpCmd P2P Write Buffer Size (max lines) .. def = 2
Offset 4D – SB V-Link Bus Timer (44h) .........................RW
7-4 Timer for Normal Priority Requests from NB
0000 Immediate
0001 1*4 VCLKs
0010 2*4 VCLKs
0011 3*4 VCLKs
0100 4*4 VCLKs ............................................default
0101 5*4 VCLKs
0110 6*4 VCLKs
0111 7*4 VCLKs
1000 8*4 VCLKs
1001 16*4 VCLKs
1010 32*4 VCLKs
1011 64*4 VCLKs
11xx Own the bus for as long as there is a request
3-0 Timer for High Priority Requests from NB
0000 Immediate
0001 1*2 VCLKs
0010 2*2 VCLKs
0011 3*2 VCLKs
0100 4*2 VCLKs ............................................default
0101 5*2 VCLKs
0110 6*2 VCLKs
0111 7*2 VCLKs
1000 8*2 VCLKs
1001 16*2 VCLKs
1010 32*2 VCLKs
1011 64*2 VCLKs
11xx Own the bus for as long as there is a request
Offset 4E – CCA Master Priority (00h).......................... RW
7 1394 High Priority
0 Low priority........................................... default
1 High priority
6 LAN / NIC High Priority
0 Low priority........................................... default
1 High priority
5 Reserved ........................................always reads 0
4 USB High Priority
0 Low priority........................................... default
1 High priority
3 Reserved ........................................always reads 0
2 IDE High Priority
0 Low priority........................................... default
1 High priority
1 AC97-ISA High Priority
0 Low priority........................................... default
1 High priority
0 PCI High Priority
0 Low priority........................................... default
1 High priority
Offset 4F – SB V-Link Misc Control (00h)..................... RW
7 Upstream Command High Priority
0 Disable high priority up commands....... default
1 Enable high priority up commands
6-4 Reserved ........................................always reads 0
3 Up Strobe Dynamic Stop
0 Disable................................................... default
1 Enable
2-1 Reserved ........................................always reads 0
0 Down Cycle Wait for Up Cycle Write Flush
(Except Down Cycle Post Write)
0 Disable................................................... default
1 Enable
Offset 57 – Bank 7 Ending (01h) ...................................... RO
DRAM Bank 7 Ending Address High (HA[31:24]) sent to the
South Bridge. (See also Function 3 Rx47).
Offset 61 – C-ROM Shadow (00h) .................................. RW
(same as Function 3 Rx80)
Offset 62 – D-ROM Shadow (00h) .................................. RW
(same as Function 3 Rx81)
Offset 63 – F-ROM Shadow / Mem Hole / SMI (00h) ... RW
(same as Function 3 Rx82)
Offset 64 – E-ROM Shadow (00h)................................... RW
(same as Function 3 Rx83)