Product specifications

CN333 Data Sheet
Revision 1.0, January 5, 2005 -42- Device 0 Function 2 Register Descriptions – Host CPU
Host CPU AGTL+ I/O Control
Offset 70 – Host Address (2x) Pullup Drive....................RW
7 Reserved ........................................ always reads 0
6-4 Reserved (Do Not Program).................... default = 0
3 Reserved ........................................ always reads 0
2-0 Address Pullup Drive (HA,HREQ#) ...... default = 0
Offset 71 – Host Address (2x) Pulldown Drive ...............RW
7 Reserved ........................................ always reads 0
6-4 Reserved (Do Not Program).................... default = 0
3 Reserved ........................................ always reads 0
2-0 Address Pulldown Drive (HA,HREQ#) . default = 0
Offset 72 – Host Data (1x) Pullup Drive..........................RW
7 Reserved ........................................ always reads 0
6-4 Reserved (Do Not Program).................... default = 0
3 Reserved ........................................ always reads 0
2-0 Data Pullup Drive (HD)........................... default = 0
Offset 73 – Host Data (1x) Pulldown Drive.....................RW
7 Reserved ........................................ always reads 0
6-4 Reserved (Do Not Program).................... default = 0
3 Reserved ........................................ always reads 0
2-0 Data Pulldown Drive (HD)...................... default = 0
Note: Refer to BIOS Porting Guide for recommended
settings for these bits for typical system
configurations.
Offset 74 – Output Delay / Stagger Control....................RW
7-6 Reserved ........................................ always reads 0
5 HD[63:48, 31:16] Output Stagger
0 No delay .................................................default
1 1 nsec delay
4 HA[31:17] Output Stagger
0 No delay .................................................default
1 1 nsec delay
3-0 Reserved ........................................ always reads 0
Offset 75 – AGTL+ I/O Control (00h) ............................ RW
7 AGTL+ 1x Input Increase Delay to Filter Noise
0 Disable................................................... default
1 Enable
6 AGTL+ 2x Input Increase Delay to Filter Noise
0 Disable................................................... default
1 Enable
5 AGTL+ Slew Rate Control
0 Disable................................................... default
1 Enable
4 Increase Delay for First HD Strobe
0 Disable................................................... default
1 Enable
3 Input Pullup
0 Disable................................................... default
1 Enable
2 AGTL+ Strobe Internal Termination Pullups
0 Disable................................................... default
1 Enable
1 AGTL+ Data Internal Termination Pullups
0 Disable................................................... default
1 Enable
0 AGTL+ Dynamic Compensation
0 Disable................................................... default
1 Enable
Offset 76 – AGTL+ Comp Status (00h) .......................... RW
7 Select AutoCompensation Drive
0 Disable................................................... default
1 Enable (RxD8-DB set automatically on-chip
based on auto compensation results)
6-4 AGTL+ Compensation Result................. default = x
3 AGTL+ POS Function
0 Inputs always powered .......................... default
1 Inputs powered down when not in input mode
2 Auto Configure........................ Set from VD6 Strap
0 Disable (strap pulled low)
1 Enable (strap pulled high). AGTL+ Drive
settings and other chip configuration settings
are stored in ROM, transferred from the South
Bridge (via the V-Link bus) and loaded into
the North Bridge automatically after system
reset. Refer to the BIOS Porting Guide for
layout of the AutoConfigure settings in ROM
and for recommended bit settings.
1-0 Reserved (Do Not Program)....................default = 0
Offset 77 – AGTL+ Auto Comp Offset (00h) ................. RW
7-4 AGTL+ Drive Offset to Comp Result for 2x Pad
..............................................default = 0
3-0 AGTL+ Drive Offset to Comp Result for 1x Pad
..............................................default = 0