Product specifications

CN333 Data Sheet
Revision 1.0, January 5, 2005 -32- Device 0 Function 0 Register Descriptions - AGP
Device 0 Function 0 Header Registers (continued)
Offset E - Header Type (00h) ............................................RO
7-0 Header Type Code
..................Rx4F[0]=0: reads 00h: single function
...................Rx4F[0]=1: reads 80h, multi function
Offset F - Built In Self Test (BIST) (00h) .........................RO
7 BIST Supported .......reads 0: no supported functions
6-0 Reserved ........................................ always reads 0
Offset 13-10 - Graphics Aperture Base (AGP 2.0)
(00000008h) .......................................................................RW
This register is interpreted per the following definition if
Rx4D[2]=0 (AGP 2.0 header at Rx80h).
31-28 Upper Programmable Base Address Bits ...... def=0
27-20 Lower Programmable Base Address Bits ...... def=0
These bits behave as if hardwired to 0 if the
corresponding AGP 2.0 Graphics Aperture Size
register bit (Device 0 Function 0 Offset B4h) is 0.
27 26 25 24 23 22 21 20 (Base)
7
6 5 4 3 2 1 0 (Size)
RW RW RW RW RW RW RW RW 1M
RW RW RW RW RW RW RW 0 2M
RW RW RW RW RW RW 0 0 4M
RW RW RW RW RW 0 0 0 8M
RW RW RW RW 0 0 0 0 16M
RW RW RW 0 0 0 0 0 32M
RW RW 0 0 0 0 0 0 64M
RW 0 0 0 0 0 0 0 128M
0 0 0 0 0 0 0 0 256M
19-4 Reserved ........................................ always reads 0
3 Prefetchable.......................................always reads 1
Indicates that the locations in the address range
defined by this register are prefetchable.
2-1 Type ........................................ always reads 0
Indicates the address range in the 32-bit address
space.
0 Memory Space.................................... always reads 0
Indicates the address range in the memory address
space.
Offset 13-10 - Graphics Aperture Base (AGP 3.0)
(00000008h) ...................................................................... RW
This register is interpreted per the following definition if
Rx4D[2]=1 (AGP 3.0 header at Rx80h).
31-22 Programmable Base Address Bits...................def=0
These bits behave as if hardwired to 0 if the
corresponding AGP 3.0 Graphics Aperture Size
register bit (Device 0 Function 0 Offset 94h) is 0.
31 30 29 28 - - 27 26 25 24 23 22 (Base)
11
10 9 8 7 6 5 4 3 2 1 0 (Size)
RW RW RW RW 0 0 RW RW RW RW RW RW 4M
RW RW RW RW 0 0 RW RW RW RW RW 0 8M
RW RW RW RW 0 0 RW RW RW RW 0 0 16M
RW RW RW RW 0 0 RW RW RW 0 0 0 32M
RW RW RW RW 0 0 RW RW 0 0 0 0 64M
RW RW RW RW 0 0 RW 0 0 0 0 0 128M
RW RW RW RW 0 0 0 0 0 0 0 0 256M
RW RW RW 0 0 0 0 0 0 0 0 0 512M
RW RW 0 0 0 0 0 0 0 0 0 0 1G
RW 0 0 0 0 0 0 0 0 0 0 0 2G-max
0 0 0 0 0 0 0 0 0 0 0 0 4G
21-4 Reserved ........................................always reads 0
3 Prefetchable ...................................... always reads 1
Indicates that the locations in the address range
defined by this register are prefetchable.
2-1 Type ........................................always reads 0
Indicates the address range in the 32-bit address
space.
0 Memory Space ....................................always reads 0
Indicates the address range in the memory address
space.
Offset 2D-2C – Subsystem Vendor ID (0000h) ........... R/W1
15-0 Subsystem Vendor ID .............................. default = 0
This register may be written once and is then read only.
Offset 2F-2E – Subsystem ID (0000h).......................... R/W1
15-0 Subsystem ID ............................................default = 0
This register may be written once and is then read only.
Offset 37-34 - Capability Pointer (CAPPTR).................. RO
Contains an offset from the start of configuration space.
31-0 AGP Capability List Ptr ...always reads 0000 0080h