Product specifications

CN333 Data Sheet
Revision 1.0, January 5, 2005 -15- Pin Descriptions
Ultra V-Link Pin Descriptions
Ultra V-Link Interface
Signal Name Pin # I/O Signal Description
VD15
VD14
VD13
VD12
VD11
VD10
VD9
VD8
VD7
VD6
VD5
VD4
VD3
VD2
VD1
VD0
AK21
AG20
AK13
AJ13
AH20
AK20
AJ14
AH14
AF19
AH19
AH15
AF15
AF18
AH18
AG15
AH16
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
V-Link Data Bus. During system initialization, VD[7:0] are used to
transmit strap information from the South Bridge (the straps are not on
the VD pins but are on the indicated pins of the South Bridge chip).
Check the strap pin table for details.
VPAR
AF14 IO
V-Link Parity.
VBE#
AG16 IO
V-Link Byte Enable.
UPCMD
AG19 I
V-Link Command from Client (South Bridge) to Host (North
Bridge).
UPSTB+
AH17 I
V-Link Strobe from Client to Host.
UPSTB–
AJ17 I
V-Link Complement Strobe from Client to Host.
DNCMD
AG18 O
V-Link Command from Host (North Bridge) to Client (South
Bridge).
DNSTB+
AF16 O
V-Link Strobe from Host to Client.
DNSTB–
AF17 O
V-Link Complement Strobe from Host to Client.
Note: I/O pads for the pins in the above table are powered by VCC15VL. Input voltage levels are referenced to VLVREF.