Product specifications

CN333 Data Sheet
Revision 1.0, January 5, 2005 -6- Overview
Ultra V-Link
The CN333 North Bridge interfaces to the South Bridge through a high speed (up to 1 GB / Sec) 8x, 66 MHz Data Transfer
interconnect bus called “Ultra V-Link”. Deep pre-fetch and post-write buffers are included to allow for concurrent CPU and V-
Link operation. The combined CN333 North Bridge and VT8237R South Bridge system supports enhanced PCI bus commands
such as “Memory-Read-Line”, “Memory-Read-Multiple” and “Memory-Write-Invalid” commands to minimize snoop overhead.
In addition, advanced features are supported such as CPU write-back forward to PCI master and CPU write-back merged with PCI
post write buffers to minimize PCI master read latency and DRAM utilization. Delay transaction and read caching mechanisms are
also implemented for further improvement of overall system performance.
System Power Management
For sophisticated power management, the CN333 supports dynamic CKE control to minimize DDR SDRAM power consumption
during normal system state (S0). A separate suspend-well plane is implemented for the memory control logic for the Suspend-to-
DRAM state. VIA PowerSaver™ Technology is supported to minimize CPU power consumption while sustaining processing
power. The CN333 graphics accelerator implements automatic clock gating for each graphics engine to achieve power saving,
moving to standby or suspend states to further reduce power consumption when idle. Automatic panel power sequencing and
VESA DPMS (Display Power Management Signaling) CRT power-down are supported. Coupled with the VT8237R South
Bridge chip, a complete power conscious PC main board can be implemented with no external glue logic.
3D Graphics Engine
Featuring an integrated 128-bit 3D graphics engine, the CN333 North Bridge utilizes a highly pipelined architecture that provides
high performance along with superior image quality. Several new features enhance the 3D architecture, including two pixel
rendering pipes, single-pass multitexturing, bump and cubic mapping, texture compression, edge anti-aliasing, vertex fog and fog
table, hardware back-face culling, specular lighting, anisotropic filtering and an 8-bit stencil buffer. The chip also offers the
industry’s only simultaneous usage of single-pass multitexturing and single-cycle trilinear filtering – enabling stunning image
quality without performance loss. Image quality is further enhanced with true 32-bit color rendering throughout the 3D pipeline to
produce more vivid and realistic images. The advanced triangle setup engine provides industry leading 3D performance for a
realistic user experience in games and other interactive 3D applications. The 3D engine is optimized for AGP texturing from
system memory.
128-bit 2D Graphics Engine
The CN333 North Bridge's advanced 128-bit 2D graphics engine delivers high-speed 2D acceleration for productivity applications.
The enhanced 2D architecture with direct access frame buffer capability optimizes UMA performance and provides acceleration of
all color depths.
MPEG Video Playback
The CN333 North Bridge provides the ideal architecture for high quality MPEG-2 based video applications. For MPEG playback,
the integrated video accelerator offloads the CPU by performing planar-to-packed format conversion and motion video
compensation tasks, while the enhanced scaling algorithm delivers incredible full-screen video playback.