Technical data

Analog Integrated Circuit Device Data
Freescale Semiconductor 53
908E621
TYPICAL APPLICATIONS
TYPICAL APPLICATIONS
DEVELOPMENT SUPPORT
As the 908E621 has the MC68HC908EY16 MCU
embedded, typically all the development tools available for
the MCU also apply for this device. However, due to the
additional analog die circuitry and the nominal +12V supply
voltage, some additional items have to be considered:
• nominal 12V rather than 5V or 3V supply
• high voltage V
TST
might be applied not only to IRQ
terminal, but IRQ_A terminal
• MCU monitoring (Normal request time-out) has to be
disabled
For a detailed information on the MCU related
development support see the MC68HC908EY16 datasheet -
section development support.
The programming is principally possible at two stages in
the manufacturing process - first on chip level, before the IC
is soldered onto a pcb board, and second after the IC is
soldered onto the pcb board.
Chip level programming
At the Chip level, the easiest way is to only power the MCU
with +5V (see Figure 30
), and not to provide the analog chip
with VSUP. In this setup all the analog terminal should be left
open (e.g. VSUP[1:8]) and interconnections between MCU
and analog die have to be separated (e.g.
IRQ - IRQ_A).
This mode is well described in the MC68HC908EY16
datasheet - section development support.
Figure 30. Normal Monitor Mode Circuit (MCU only)
Of course its also possible to supply the whole system with
Vsup instead (12V) as described in Figure 31
, page 54.
MM908E621
RST_A
RST
IRQ_A
IRQ
VSUP[1:8]
GND[1:4]
PTC4/OSC1
PTB3/AD3
PTB4/AD4
PTA0/KBD0
PTA1/KBD1
TESTMODE
MAX232
10k
RS232
DB-9
1
3
C1+
C1-
4
5
C2+
C2-
7
8
2
3
5
V
CC
GND
16
15
2
V+
V-
6
1µF
+
1µF
+
+
1µF
1µF
+
+
1µF
2
1
3
65
4
74HC125
74HC125
9.8304MHz CLOCK
+5V
+5V
DATA
CLK
+5V
10k
10k
10k
V
TST
10
9
T2
OUT
R2
IN
T2
IN
R2
OUT
VSSA/VREFL
VDDA/VREFH
EVDD
VDD
EVSS
VSS
4.7µF100nF
+5V