Data Sheet

MFRC522 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.9 — 27 April 2016
112139 86 of 95
NXP Semiconductors
MFRC522
Standard performance MIFARE and NTAG frontend
16.1.3.4 Example: Output test signals RxActive and TxActive
Figure 31
shows the RxActive and TxActive test signals relating to RF communication.
The AnalogTestReg register is set to CDh.
• At 106 kBd, RxActive is HIGH during data bits, parity and CRC reception. Start bits
are not included
• At 106 kBd, TxActive is HIGH during start bits, data bits, parity and CRC transmission
• At 212 kBd, 424 kBd and 848 kBd, RxActive is HIGH during data bits and CRC
reception. Start bits are not included
• At 212 kBd, 424 kBd and 848 kBd, TxActive is HIGH during data bits and CRC
transmission
(1) RxActive (2 V/div) on pin AUX1.
(2) TxActive (2 V/div) on pin AUX2.
(3) RF field.
Fig 31. Output RxActive on pin AUX1 and TxActive on pin AUX2
10 μs/div
001aak600
(1)
(2)
(3)