Data Sheet

MFRC522 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.9 — 27 April 2016
112139 51 of 95
NXP Semiconductors
MFRC522
Standard performance MIFARE and NTAG frontend
9.3.2.6 TxASKReg register
Controls transmit modulation settings.
9.3.2.7 TxSelReg register
Selects the internal sources for the analog module.
Table 63. TxASKReg register (address 15h); reset value: 00h bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol reserved Force100ASK reserved
Access - R/W -
Table 64. TxASKReg register bit descriptions
Bit Symbol Value Description
7 reserved - reserved for future use
6 Force100ASK 1 forces a 100 % ASK modulation independent of the ModGsPReg
register setting
5 to 0 reserved - reserved for future use
Table 65. TxSelReg register (address 16h); reset value: 10h bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol: reserved DriverSel[1:0] MFOutSel[3:0]
Access: - R/W R/W
Table 66. TxSelReg register bit descriptions
Bit Symbol Value Description
7 to 6 reserved - reserved for future use
5 to 4 DriverSel
[1:0]
- selects the input of drivers TX1 and TX2
00 3-state; in soft power-down the drivers are only in 3-state
mode if the DriverSel[1:0] value is set to 3-state mode
01 modulation signal (envelope) from the internal encoder, Miller
pulse encoded
10 modulation signal (envelope) from pin MFIN
11 HIGH; the HIGH level depends on the setting of bits
InvTx1RFOn/InvTx1RFOff and InvTx2RFOn/InvTx2RFOff