Data Sheet

MFRC522 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.9 — 27 April 2016
112139 4 of 95
NXP Semiconductors
MFRC522
Standard performance MIFARE and NTAG frontend
6. Block diagram
The analog interface handles the modulation and demodulation of the analog signals.
The contactless UART manages the protocol requirements for the communication
protocols in cooperation with the host. The FIFO buffer ensures fast and convenient data
transfer to and from the host and the contactless UART and vice versa.
Various host interfaces are implemented to meet different customer requirements.
Fig 1. Simplified block diagram of the MFRC522
001aaj627
HOST
ANTENNA
FIFO
BUFFER
ANALOG
INTERFACE
CONTACTLESS
UART
SERIAL UART
SPI
I
2
C-BUS
REGISTER BANK