Data Sheet

MFRC522 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.9 — 27 April 2016
112139 37 of 95
NXP Semiconductors
MFRC522
Standard performance MIFARE and NTAG frontend
21h CRCResultReg shows the MSB and LSB values of the CRC calculation Table 87 on page 57
22h Table 89 on page 57
23h Reserved reserved for future use Table 91 on page 58
24h ModWidthReg controls the ModWidth setting Table 93 on page 58
25h Reserved reserved for future use Table 95 on page 58
26h RFCfgReg configures the receiver gain Table 97 on page 59
27h GsNReg selects the conductance of the antenna driver pins TX1 and
TX2 for modulation
Table 99 on page 59
28h CWGsPReg defines the conductance of the p-driver output during
periods of no modulation
Table 101 on page 60
29h ModGsPReg defines the conductance of the p-driver output during
periods of modulation
Table 103 on page 60
2Ah TModeReg defines settings for the internal timer Table 105 on page 60
2Bh TPrescalerReg Table 107 on page 61
2Ch TReloadReg defines the 16-bit timer reload value Table 109 on page 62
2Dh Table 111 on page 62
2Eh TCounterValReg shows the 16-bit timer value Table 113 on page 63
2Fh Table 115 on page 63
Page 3: Test register
30h Reserved reserved for future use Table 117 on page 63
31h TestSel1Reg general test signal configuration Table 119 on page 63
32h TestSel2Reg general test signal configuration and PRBS control Table 121 on page 64
33h TestPinEnReg enables pin output driver on pins D1 to D7 Table 123 on page 64
34h TestPinValueReg defines the values for D1 to D7 when it is used as an I/O bus Table 125 on page 65
35h TestBusReg shows the status of the internal test bus Table 127 on page 65
36h AutoTestReg controls the digital self test Table 129 on page 66
37h VersionReg shows the software version Table 131 on page 66
38h AnalogTestReg controls the pins AUX1 and AUX2 Table 133 on page 67
39h TestDAC1Reg defines the test value for TestDAC1 Table 135 on page 68
3Ah TestDAC2Reg defines the test value for TestDAC2 Table 137 on page 68
3Bh TestADCReg shows the value of ADC I and Q channels Table 139 on page 68
3Ch to 3Fh Reserved reserved for production tests Table 141 to Table 147
on page 69
Table 20. MFRC522 register overview …continued
Address
(hex)
Register name Function Refer to