Data Sheet

Revision 2.0 Page 55 of 74
nRF24L01 Product Specification
07 STATUS Status Register (In parallel to the SPI command
word applied on the MOSI pin, the STATUS reg-
ister is shifted serially out on the MISO pin)
Reserved 7 0 R/W Only '0' allowed
RX_DR 6 0 R/W Data Ready RX FIFO interrupt. Asserted when
new data arrives RX FIFO
b
.
Write 1 to clear bit.
TX_DS 5 0 R/W Data Sent TX FIFO interrupt. Asserted when
packet transmitted on TX. If AUTO_ACK is acti-
vated, this bit is set high only when ACK is
received.
Write 1 to clear bit.
MAX_RT 4 0 R/W Maximum number of TX retransmits interrupt
Write 1 to clear bit. If MAX_RT is asserted it must
be cleared to enable further communication.
RX_P_NO 3:1 111 R Data pipe number for the payload available for
reading from RX_FIFO
000-101: Data Pipe Number
110: Not Used
111: RX FIFO Empty
TX_FULL 0 0 R TX FIFO full flag.
1: TX FIFO full.
0: Available locations in TX FIFO.
08 OBSERVE_TX Transmit observe register
PLOS_CNT 7:4 0 R Count lost packets. The counter is overflow pro-
tected to 15, and discontinues at max until
reset. The counter is reset by writing to RF_CH.
See page 65
and page 74.
ARC_CNT 3:0 0 R Count retransmitted packets. The counter is
reset when transmission of a new packet starts.
See page 65
.
09 CD
Reserved 7:1 000000 R
CD 0 0 R Carrier Detect. See page page 74
.
0A RX_ADDR_P0 39:0 0xE7E7E
7E7E7
R/W Receive address data pipe 0. 5 Bytes maximum
length. (LSByte is written first. Write the number
of bytes defined by SETUP_AW)
0B RX_ADDR_P1 39:0 0xC2C2C
2C2C2
R/W Receive address data pipe 1. 5 Bytes maximum
length. (LSByte is written first. Write the number
of bytes defined by SETUP_AW)
0C RX_ADDR_P2 7:0 0xC3 R/W Receive address data pipe 2. Only LSB. MSBy-
tes is equal to RX_ADDR_P1[39:8]
0D RX_ADDR_P3 7:0 0xC4 R/W Receive address data pipe 3. Only LSB. MSBy-
tes is equal to RX_ADDR_P1[39:8]
0E RX_ADDR_P4 7:0 0xC5 R/W Receive address data pipe 4. Only LSB. MSBy-
tes is equal to RX_ADDR_P1[39:8]
0F RX_ADDR_P5 7:0 0xC6 R/W Receive address data pipe 5. Only LSB. MSBy-
tes is equal to RX_ADDR_P1[39:8]
Address
(Hex)
Mnemonic Bit
Reset
Value
Type Description