Data Sheet
Revision 2.0 Page 42 of 74
nRF24L01 Product Specification
7.9.4 Single transaction with ACK payload packet
Figure 18. is a scenario of the basic auto acknowledgement with payload. After the packet is transmitted by
the PTX and received by the PRX the ACK packet with payload is transmitted from the PRX to the PTX.
The RX_DR IRQ is asserted after the packet is received by the PRX, whereas on the PTX side the TX_DS
IRQ is asserted when the ACK packet is received by the PTX. On the PRX side, the TX_DS IRQ for the
ACK packet payload is asserted after a new packet from PTX is received. The position of the IRQ in Figure
18. shows where the MCU can respond to the interrupt.
Figure 18. TX/RX cycles with ACK Payload and the according interrupts
7.9.5 Single transaction with ACK payload packet and lost packet
Figure 19. is a scenario where the first packet is lost and a retransmission is needed before the RX_DR IRQ
on the PRX side is asserted. For the PTX both the TX_DS and RX_DR IRQ are asserted after the ACK
packet is received. After the second packet (PID=2) is received on the PRX side both the RX_DR (PID=2)
and TX_DS (ACK packet payload) IRQ are asserted.
Figure 19. TX/RX cycles and the according interrupts when the packet transmission fails
1 Radio Turn Around Delay
2 Uploading Paylod for Ack Packet
3 Delay defined by MCU on PTX side, ≥ 130us
TX:PID=1 RX
PTX
PRX
RX
MCU PRX
UL1
MCU PTX
TX:PID=2
DL
IRQ
ACK received
IRQ: TX DS (PID=1)
RX DR (ACK1PAY)
Transmit of packet
PID=2
Packet received.
IRQ: RX DR (PID=1)
RX
Packet received.
IRQ: RX DR (PID=2)
TX DS (ACK1PAY)
DL
DL
IRQ
UL2
UL
2
130us
1
≥130us
3
ACK1 PAY
TX:PID=1 RX
PTX
PRX
RX
DL
MCU PRX
UL1
MCU PTX
130us
1
TX:PID=1 RX
ARD
No address detected .
RX off to save current
Retransmit of packet
PID=1
ACK received
IRQ: TX DS (PID=1)
RX DR (ACK1PAY)
TX:PID=2
RXACK1 PAY
Packet received.
IRQ: RX DR (PID=2)
TX DS (ACK1PAY)
Auto retransmit delay
elapsed
130us
1
130us
1
Packet PID=1 lost
during transmission
Packet received.
IRQ: RX DR (PID=1)
DLUL
2
UL2
DL
IRQ
≥130us
3
1 Radio Turn Around Delay
2 Uploading Paylod for Ack Packet
3 Delay defined by MCU on PTX side, ≥ 130us