Specifications

Embedded System Tools Guide (EDK 6.2i) www.xilinx.com 345
UG111 (v1.4) January 30, 2004 1-800-255-7778
Example Systems for PowerPC
R
XExc_RegisterHandler(XEXC_ID_NON_CRITICAL_INT,
(XExceptionHandler)XIntc_DeviceInterruptHandler, (void
*)XPAR_MYINTC_BASEADDR);
/* Connect uart interrupt handler that will be called when an interrupt
* for the uart occurs
*/
XIntc_RegisterHandler(XPAR_MYINTC_BASEADDR,
XPAR_MYINTC_MYUART_INTERRUPT_INTR,
(XInterruptHandler)uart_int_handler,
(void *)XPAR_MYUART_BASEADDR);
/* Start the interrupt controller */
XIntc_mMasterEnable(XPAR_MYINTC_BASEADDR);
/* Set the gpio as output on high 3 bits (LEDs)*/
XGpio_mSetDataDirection(XPAR_MYGPIO_BASEADDR, 0x00);
/* set the number of cycles the timer counts before interrupting */
XTmrCtr_mSetLoadReg(XPAR_MYTIMER_BASEADDR, 0,
(timer_count*timer_count+1) * 1000000);
/* reset the timers, and clear interrupts */
XTmrCtr_mSetControlStatusReg(XPAR_MYTIMER_BASEADDR, 0,
XTC_CSR_INT_OCCURED_MASK | XTC_CSR_LOAD_MASK );
/* Enable timer and uart interrupts in the interrupt controller */
XIntc_mEnableIntr(XPAR_MYINTC_BASEADDR,
XPAR_MYTIMER_INTERRUPT_MASK);
/* start the timers */
XTmrCtr_mSetControlStatusReg(XPAR_MYTIMER_BASEADDR, 0,
XTC_CSR_ENABLE_TMR_MASK | XTC_CSR_ENABLE_INT_MASK |
XTC_CSR_AUTO_RELOAD_MASK | XTC_CSR_DOWN_COUNT_MASK);
/* Wait for interrupts to occur */
while (1)
;
}