Specifications

Embedded System Tools Guide (EDK 6.2i) www.xilinx.com 271
UG111 (v1.4) January 30, 2004 1-800-255-7778
Design Considerations
R
3-state (InOut) Signals
At the MHS/MPD level, there is a listing for an inout port in the MPD file that allows you
to map to it in the MHS file. In the MPD file, a 3-state signal is identified by the inout
direction mode, and the port name must be ioname.
The EDK tools expands the inout port in the MPD file to three ports in the port declaration
section of the HDL file, and writes out the RTL code to infer the IOBUF. This port
expansion occurs because if the top-level is synthesized without IO insertion, the 3-states
on the inout ports are inferred as BUFTs at the CLB level. However, they should be inferred
as IOBUFs at the IOB level. The EDK tools infers the 3-states at the top-level to ensure that
the inout ports are always associated to the IOBUF.
Inout ports are currently defined at the top-level since the only internal signals are those
defined as an input or an output. There are no inout signals defined internally that need a
BUFT.
It is important to note that the 3-state enables are all active-low to allow a direct connection
to the OBUFT of the IOBUF.
VHDL 3-state (InOut) With Multi-Bit Enable Example
The following is a VHDL example that includes 3-state signal with a multi-bit enable:
entity tri_state_multi is
generic (C_WIDTH: integer:= 9);
port (
-- tri-state signal
tristate_I: in std_logic_vector(0 to C_WIDTH-1);
tristate_O: out std_logic_vector(0 to C_WIDTH-1);
tristate_T: out std_logic_vector(0 to C_WIDTH-1));
end entity tri_state_multi;
MPD 3-state (InOut) With Multi-Bit Enable Example
The following is a MPD example that includes 3-state signal with a multi-bit enable:
BEGIN tri_state_multi
OPTION IPTYPE=IP
PARAMETER C_WIDTH = 9, DT=integer
PORT tristate = “”, DIR=INOUT, VEC=[0:C_WIDTH-1], ENABLE=MULTI, THREE_STATE=TRUE
END
VHDL 3-state (InOut) With Single-Bit Enable Example
The following is a VHDL example that includes 3-state signal with a single-bit enable:
entity tri_state_single is
Figure 16-1: OBUF Implementation
X9877
MY_IP
IOBUF
T
I
O
O
O
I
IPIO_T
IPIO_O
IPIO
IPIO_I