Specifications

Embedded System Tools Guide (EDK 6.2i) www.xilinx.com 249
UG111 (v1.4) January 30, 2004 1-800-255-7778
Port
R
PAIR
The PAIR keyword tags unidentified BASEADDR-HIGHADDR pairs. If non-standard
names are used instead of C_BASEADDR and C_HIGHADDR, then address parameters
must identify pairs that define the BASE and HIGH. Must use the ADDRESS keyword to
identify parameter as BASE address or HIGH address.
Format
PARAMETER C_HIGH=0x00000000, PAIR=C_BASE, ADDRESS=HIGH
PARAMETER C_BASE=0xFFFFFFFF, PAIR=C_HIGH, ADDRESS=BASE
RANGE
Defines a range of allowed valid values. Covers sequences like 8,16,24,32 or breaks in
ranges. For example: RANGE=(1:4,8,16).
Format
PARAMETER C_HAS_EXTERNAL_XIN=0, DT=integer, RANGE=(0:1)
SYSLEVEL_UPDATE_PROC
The SYSLEVEL_UPDATE_PROC keyword defines the Tcl entry point for the stem-level
update routine. Do update based on only system-level settings. Currently, unsupported.
Format
PARAMETER C_OPB_AWIDTH = 32, SYSLEVEL_DRC_PROC = proc_name
Parameter Naming Conventions
An MPD parameter correlates to a generic for VHDL or parameter for Verilog. The
parameter name must be HDL (VHDL, Verilog) compliant. VHDL and Verilog have certain
naming rules and conventions that must be followed.
Port
A port defines a data flow path that is passed into the entity (VHDL) or module (Verilog)
declaration.