Specifications

240 www.xilinx.com Embedded System Tools Guide (EDK 6.2i)
1-800-255-7778 UG111 (v1.4) January 30, 2004
Chapter 16: Microprocessor Peripheral Description (MPD)
R
DESC
Allows a short description of the core to be displayed by the GUI tools. The short
description replaces the core name in display field of the core.
Format
OPTION DESC = “OPB GPIO”
DWIDTH
The data width is specified by the DWIDTH keyword.
Format
OPTION DWIDTH = 32
HDL
The HDL keyword lists the HDL availability. The design is either completely written in
VHDL, or completely written in Verilog. The BOTH value signifies that a design is
available in VHDL or Verilog format.
Format
OPTION HDL = VERILOG
IMP_NETLIST
The IMP_NETLIST keyword directs PlatGen to write an implementation netlist file for the
peripheral.
Format
OPTION IMP_NETLIST = TRUE
The default is FALSE.
IP_GROUP
The IP_GROUP keyword defines the core group classification.
Format
OPTION IP_GROUP = USER
DEVELOPMENT Core is in development and will be synthesized each time
PlatGen is executed (no cache of synthesis results)
OBSOLETE Core is obsolete. EDK tools issue an error that this core is no
longer valid.
Table 16-5: CORE_STATE Values
CORE_STATE Definition