Specifications

238 www.xilinx.com Embedded System Tools Guide (EDK 6.2i)
1-800-255-7778 UG111 (v1.4) January 30, 2004
Chapter 16: Microprocessor Peripheral Description (MPD)
R
ADDR_SLICE
The least significant address bit used for a 2
N
byte wide addressable memory by the BRAM
controller is specified by the ADDR_SLICE keyword.
Format
OPTION ADDR_SLICE = 29
Used only by components of SPECIAL=BRAM_CNTLR.
Given a 32-bit big endian address bus: bit 31address is on byte granularity, bit 30 on half-
word, bit 29 on word, and bit 28 on double word. For example, the PLB data bus is 64 bits
IPTYPE BRIDGE
BUS
BUS_ARBITER
IP
PERIPHERAL
PROCESSOR
IP Type of component
IS_COMPATIBLE_WITH string No Default Identify backwards compatibility of
previous versions
LONG_DESC string No Default Allows a long description of the core to be
displayed by the GUI tools
MAX_MASTERS integer No Default Define maximum number of masters
MAX_SLAVES integer No Default Define maximum number of slaves
NUM_WRITE_ENABLES integer No Default Number of write enables of BRAM controller
RUN_NGCBUILD TRUE
FALSE
FALSE Run NGCBUILD to merge multiple
hardware netlists into a single deliverable
hardware netlist
SPECIAL BRAM
BRAM_CNTLR
No Default A class of components that require special
handling
STYLE BLACKBOX
MIX
HDL
HDL Design style
SYSLEVEL_DRC_PROC string No Default Tcl entry point for the system-level DRC
routine. Currently, unsupported.
TCL_FILE string No Default Define Tcl file name. Currently,
unsupported.
TOP string No Default Top-level name (deprecated)
USAGE_LEVEL ADVANCED_USER
ALL_USERS
ALL_USERS Defines usage level
Table 16-4: Option Keywords
Keyword Values Default Definition